8.2.1 Multilayer OE Boards And 3-D Stacked OE Multi-Chip Modules

Figure 8.2 shows a multilayer OE board and a 3-D stacked OE multi-chip-module (MCM) based on the 3-D OE platform. In the multilayer OE board [1, 2, 3 and 4], a plurality of optical waveguide films with 45° reflectors are stacked. Thin-film active devices such as light modulators and PDs are embedded for E-O and O-E conversions. In the example shown in Figure 8.2, E-O and O-E conversions are performed in the second layer from the top, where thin-film active devices are embedded. The third and fourth layers are used for multilayer optical signal routing, which avoids wiring interference in high-density interconnect systems.

The first layer is an interface film, where thin-film ICs are embedded. On the interface film, LSIs are mounted. The thin-film ICs in the interface films may perform the functions of MUX/DMUX, error correction, and drivers/amplifiers, providing standardized interface capability.

When we use OE amplifier/driver-less substrate (OE-ADLES) (described in Section 8.2.2), where E-O and O-E conversions are respectively carried out by light modulators that are directly driven by LSI output and by PDs that directly generate LSI input, the interface film is not necessary. OE-ADLES is expected to have low power dissipation and high data rate capabilities [23, 24 and 25].

In 3-D stacked OE MCM [1–8], light modulator/PD-embedded waveguide films are stacked together with films containing thin-film LSIs. The structure can be regarded as 3-D stacked OE LSI when the stacked thin-film LSIs are divided chips corresponding to blocks of an LSI chip. This structure is the goal of the 3-D OE platform for computers because it realizes 3-D wiring and optical wiring simultaneously. In the 3-D stacked OE MCM, heat generation is a serious problem. So implementation of OE-ADLES that uses high power external light sources might be mandatory for power dissipation reduction within the 3-D OE platform. By setting light sources with a plurarity of wavelengths, wavelength division multiplexing (WDM) can be performed in the interconnect systems.

Optical Z-connections in the 3-D OE platform are used to achieve optical links between the stacked waveguide films, constructing 3-D optical wiring. The optical Z-connections consist of two 45° reflectors built in the waveguide films. For long-distance connections, vertical waveguides are inserted between the 45° reflectors.

The optical interconnects based on the 3-D OE platform consisting of S-FOLM have the following advantages:

• Excess module spaces for E-O and O-E conversions are not necessary, resulting in size reduction.

• Long electrical lines for connection between LSI pads and E-O and O-E conversion sites are replaced with short vertical electrical lines, resulting in latency and bit error rate reduction.

• Material consumption for the devices can be saved by PL-Pack with SORT, resulting in cost reduction.

• Alignment between optical waveguides and thin-film devices can be performed by photolithography, resulting in low assembly cost.

• Relative positions between optical waveguides and thin-film device flakes • are insensitive to temperature, resulting in thermal stability.

• Flexible interface specification is possible by inserting interface films, permitting computer engineers to use conventional design tools without knowledge of optics.

• Multilayer structures are easily constructed by film stacking.

Thus, it is concluded that the key issue for optical interconnects within boxes, that is, drastic size and cost reduction, can be accomplished by S-FOLM implementation.

The main core technologies for the multilayer OE board and the 3-D stacked OE MCM are summarized in Figure 8.3, including high-speed, small-sized light modulators and optical switches described in Chapter 6, OE films of optical waveguides with vertical reflectors and 3-D optical wiring as described in Section 7.6, SOLNET as described in Section 7.4, and resource-saving heterogeneous integration by PL-Pack with SORT as described in Section 7.5. The polymer MQD fabricated by MLD contributes to improving the performance of the light modulators and optical switches.

8.2.2 OE Amplifier/Driver-Less Substrate (OE-ADLES)

To reduce power dissipation and increase the data rate, we proposed OE-ADLES [23–25]. Figure 8.4 shows OE-ADLES for the OE MCM. E-O and O-E conversions are respectively carried out by light modulators and PDs, which are completely embedded in OE films. LSI I/O pads are connected to electrodes of the light modulators and PDs. Strong light beams are introduced from outside into the OE MCM via an OE printed circuit board (PCB). The external light beams are directly modulated by LSI output through the light modulators without drivers. The generated optical signals are transmitted through optical waveguides to the PDs, where the optical signals are converted back to electrical signals for LSI input without amplifiers. OE-ADLES is expected to have low power dissipation and high data rate capabilities for the following reasons:

• Light sources are placed outside, reducing power dissipation within the interconnect systems.

• Light modulators, which are voltage-driven devices, are used for transmitters, reducing driving power and rising/falling time for optical signal generation.

• Strong light is available from external sources (high-power LD, mode-locked LD), achieving fast response of PDs.

8.2.3 IMPACT OF POLYMER MQDS ON OE-ADLES

In order to estimate RC delay and power dissipation in OE-ADLES, the models shown in Figure 8.5 are considered [24,25]. For electrical substrates, data transmissions are treated as a process for charging up a buffer driver, a transmission line, and a receiver through a gate resistance of the buffer driver. For OE-ADLES, on the other hand, data transmissions are treated as a process for charging up a buffer driver and a light modulator through the gate resistance of the buffer driver, and a process for charging up a PD and a receiver by photocurrents generated in the PD. In Table 8.1, the formula for the RC delay and power dissipation are summarized as well as parameters for the calculations. Attenuation along the transmission lines is neglected. External power dissipation at light sources is not included. The waveguide prism deflector (WPD) optical switch described in Sections 6.1.2 and 6.1.3 is assumed as the light modulator for the transmitter.

In Figure 8.6, the delay and power dissipation of an electrical substrate and OE-ADLES are compared. Lead lanthanum zirconate titanate (PLZT) and the polymer MQD described in Sections 5.5 and 5.7 are assumed as EO materials for the WPD optical switch. For delay, OE-ADLES with the polymer MQD has an advantage over the electrical substrate in line length ranges longer than 1.2 cm for light power of 3 mW. With increasing light power introduced from external light sources, the response time becomes shorter, moving the break-even point toward shorter line length ranges of mm. For power dissipation, drastic reduction can be seen in OE-ADLES with the polymer MQD. The break-even point is located at line length of sub mm ranges. In OE-ADLES with PLZT, comparing with OE-ADLES with the polymer MQD, the break-even point is located at longer line length ranges for both delay and power dissipation.

The superiority of optics is attributed to the capacitance reduction, that is, in the electrical substrate a large capacitance of the electrical transmission line exists, while in OE-ADLES, only small capacitances exist in the light modulators and PDs. As mentioned above, the polymer MQD exhibits faster responses and much lower power consumption compared with PLZT. The superiority of the polymer MQD comes from its small dielectric constant.

The key issue in OE-ADLES is availability of EO materials with a large EO coefficient and a small dielectric constant like the polymer MQD fabricated by the molecular layer deposition (MLD). Size reduction of the light modulators and PDs is another important issue. When they are miniaturized by one order of magnitude for each dimension, that is, the device thickness is reduced by one order of magnitude and the device area by two orders of magnitude, their capacitances as well as the internal propagation delay in PDs will be reduced by one order of magnitude in principle. This will move the break-even points to sub mm ranges.

8.3.1 The 3D-MOSS Concept

An example of 3D-MOSS configuration is shown in Figure 8.7(a) for a case involving a 32 × 32 Banyan network. It consists of five optical switch arrays, in which sixteen 2 × 2 optical switches are arranged in a 3-D optical network. The optical switch consists of EO waveguides that exhibit high-speed switching characteristics. The optical network is divided into four blocks—BL 1, 2, 3, and 4, which are stacked to make a four-layer structure. Between optical switch arrays, a connection area exists. Adjacent optical switch arrays i and i + 1 are connected by optical wiring in connection area i. Connection areas consisting of in-plane optical connections with in-plane waveguides and corner-turning micro reflectors are identified as “in-plane connection areas,” and those consisting of vertical optical connections with optical Z-connections, which are built from pairs of 45° reflectors and vertical waveguides for interplane links, are identified as “vertical connection areas.” In the model shown in Figure 8.7(a), connection areas 3, and 5 are in-plane connection areas, and connection areas 1 and 2 are vertical connection areas.

The degree of three-dimensional characteristics of the networks is represented by D_3D, which indicates the number of vertical connection areas in a 3D-MOSS. For example, in a conventional planar structure, D_3D = 0. For 3D-MOSS with two layers, in which optical wiring in connection area 1 is carried out by vertical optical connections, D_3D = 1. With increasing layer counts, D_3D increases. In the 3D-MOSS shown in Figure 8.7(a), D_3D = 2.

A possible 3D-MOSS structure is schematically illustrated in Figure 8.7(b). On a base waveguide film, OE films, in which optical switches (and driver ICs if necessary) are embedded together with optical waveguides, are stacked. The optical waveguides in the base waveguide film is connected to optical waveguides in the OE films by optical Z-connections similar to inter-OE-film connections. For example, an input light signal introduced into the 3D-MOSS from the base waveguide film is coupled to BL 2 through an optical Z-connection and is switched in the layer. The signal is coupled to BL 4 and is again switched, followed by transition to BL 3, and finally is output into the base waveguide film. 3D-MOSS has a potential for high-speed massive optical switching capability since it uses optical switches with EO waveguides.

A structural example of board-level reconfigurable optical interconnects with 3D-MOSS is shown in Figure 8.8. Thin-film VCSELs and PDs are embedded in an optical interconnect board by PL-Pack with SORT. LSIs are mounted on the board. For simplicity, interface films that should be inserted between the board and the LSIs are not drawn. When OE-ADLES is adopted, LSIs can be mounted on the board without the interface films. Instead of LSIs, 3D OE LSIs can also be used. For route switching between LSIs, 3D-MOSSs are mounted on the board. Figure 8.9 shows a possible example of 3-D reconfigurable optical interconnects built from multilayer OE boards, 3-D stacked OE MCM, and 3D-MOSSs.

8.3.2 IMPLEMENTATION OF SOLNET IN 3D-MOSSs

In optical packet switching systems, as well as in board-level reconfigurable optical interconnects, the channel count is quite large, resulting in a large number of optical coupling points. This forces us to align a lot of photonic devices precisely with enormous effort. Furthermore, in 3D-MOSS, vertical waveguides are necessary for interlayer connections. In order to achieve drastic cost reduction of the OE system, some technology to construct a 3-D optical network with a self-organized manner is required. One possible candidate is the self-organized 3-D optical circuits with SOLNET described in Section 7.4.

Figure 8.10 shows a concept for SOLNET implementation in 3-D optical circuits in S-FOLM. First, OE devices are arranged in a designed configuration in optical waveguide films to make OE films. The OE films are stacked to construct a 3-D structure. Next, by introducing some excitation to the 3-D structure from outside, self-aligned 3-D optical circuits of SOLNET are automatically constructed, including coupling optical paths between devices and optical Z-connections.

In self-organized 3-D optical circuits, even if some misalignment of the optical waveguides and the stacked films exist, self-organized optical couplings can be achieved, which will reduce fabrication cost, especially the cost for assembly and optical Z-connection formation.

For SOLNET implementation in S-FOLM, write beam insertion is a serious concern. Because 3D-MOSS has a large number of connection parts and many of them are terminated by two optical switches, it is impossible to introduce write beams from outside. The problem can be resolved, as shown in Figure 8.11, by R-SOLNET and phosphor SOLNET, as described in Section 7.4.1. First, OE films are made by transferring optical switches onto final substrates using SORT. Before the transfer, wavelength filters, which can selectively reflect write beams of wavelengths typically between 0.35 μm and 0.7 μm and pass signal beams of 0.5–1.5 μm, are deposited just on core surfaces at the edge of optical switches using atomic layer deposition (ALD) and MLD with the assistance of photolithography.

Next, as Figure 8.11 shows, a preform is constructed by stacking the OE films. For write beam generation, phosphor is partially doped in optical waveguides. Photoinduced refractive index (PRI) materials are inserted in parts where optical wiring is necessary. Then, by illuminating the phosphor with UV light from outside the 3D-MOSS, write beams generated in the phosphor are introduced into the PRI materials through optical waveguides to make SOLNET. For vertical waveguide construction, the write beams are introduced into the PRI materials from upper and lower optical waveguides through 45° reflectors to form SOLNET. For connections between an in-plane waveguide and a waveguide within an optical switch, a write beam introduced into the PRI material from the in-plane waveguide is reflected by a wavelength filter on the waveguide core edge of the optical switch. The two write beams are attracted each other to construct a SOLNET. UV light from outside corresponds to the excitation shown in Figure 8.10. It should be noted that the same method is effective for VCSEL-waveguide and PD-waveguide couplings in optical interconnect boards by depositing the wavelength filters on the active regions of VCSELs and PDs.

8.3.3 STRUCTURAL MODEL OF 3D-MOSS

In Table 8.2, parameters for the 1024 × 1024 3D-MOSS model are summarized. The 3-D optical circuit backbone consists of optical waveguides with a core cross-section of 4 × 4 µm², core refractive index n_Core of 1.52, and clad refractive index n_Clad of 1.50.

Figure 8.12 shows top-view illustrations of Banyan network models for a conventional planar structure and a 3D-MOSS structure. Channel count is N_C, meaning N_C × N_C switching is considered. In the present model, N_C is 1024. The network consists of 2 × 2 optical switch arrays, which are connected by optical waveguides in connection areas. The optical switch is the WPD optical switch shown in Figure 6.19. Although the PLZT thickness is 400 nm in Figure 6.19, in the present calculation the PLZT thickness is assumed to be 4 µm in order to match the PLZT thickness to core thickness of the 3-D optical circuit backbone. In this case, switching voltage is 12 V. One array contains N_C/2 2 × 2 optical switches with length L_SW of 1190 µm and width W_SW of 100 µm. The length of the array equals the individual switch length L_SW. The optical switch array count is S_SW, which is 10 in the present model.

In 3D-MOSS, the network is divided into N_L blocks, which are stacked to make an N_L-layer 3-D structure. The general expression for 3-D characteristics of networks, D_3D, is given as follows.

Optical wiring is carried out by vertical optical connections in connection areas 1 to D_3D, and in-plane optical connections in connection areas D_3D + 1 to S_SW − 1.

It is found from Figure 8.12 that the area of the network is drastically reduced in 3D-MOSS, when compared with the conventional planar structure. The sizes inserted in Figure 8.12, as well as in Figures 8.13 through 8.15, are calculated using the general Equations (8.2)–(8.6) described later.

Figure 8.13 shows a side-view illustration of 3D-MOSS. Since (8.1) gives D_3D = 4 for the present model with N_L = 16, vertical optical connections are in connection areas 1–4, and in-plane optical connections in connection areas 5–9. The region that includes connection areas 5–9 corresponds to the 64 × 64 Banyan network with a conventional planar structure shown in Figure 8.14. T_L and T_G are the layer thickness and gap thickness, respectively. In the present model, T_L is 46 µm and T_G is 4 µm. Thickness per one layer is 50 µm.

As an example of in-plane connection area, detail of connection area 5 is shown in Figure 8.15(a). Connections between optical switch arrays are constructed by crank-shaped waveguides consisting of a pair of corner-turning micro reflectors. P_SW and P_WG are the pitch of the optical switches and the pitch of the optical waveguides, respectively. Interswitch connection line count is expressed by N_c / 2⁵ for connection area 5. Then, by adding P_WG for buffer spaces, the length of connection area 5 is given by (N_c / 2⁵ + 1) P_WG. The width is given by ((N_c / 2) / 2D_3D)P_SW. Thus, the expressions for connection area length and width of in-plane connection area i can be generalized as follows.

In the present model, P_SW = 200 µm and P_WG = 20 µm. P_WG of 20 µm is wide enough for parallel wiring with a length of 1 cm to keep cross-talk below −30 dB for the assumed 4-µm-wide waveguides and 1.3-µm wavelength. By substituting the parameters into Equations (8.2) and (8.3), the size of connection area 5 can be calculated to be 660-µm long and 6400-µm wide. Similarly, the sizes for i = 6~9 can be calculated as shown in Figures 8.13 and 8.14.

As an example of a vertical connection area, a detailed side view of connection area 1 and a top view of a part of the connection area in BL 12 are shown in Figure 8.15(b). The interswitch connection line count in a cross-section is expressed as N_L / 2¹⁻¹ for connection area 1. Then, adding buffer spaces of 3P_WG for corner-turning micro reflectors at the front and tail ends of the connection area, the length of connection area 1 is calculated to be (N_L / 2¹⁻¹ + 5)P_WG. The width is the same as in the in-plane optical connection case. The height is N_L(T_L + G_L). Thus, the expressions for connection area length L (V), width W (V), and height H (V) of vertical connection area i can be generalized as follows.

Parameter substitution into Equations (8.4), (8.5), and (8.6) gives the size of connection area 1 of 420 µm in length, 6400 µm in width, and 800 µm in height. Similarly, the sizes for i = 2~4 can be calculated as shown in Figures 8.12 and 8.13.

8.3.4.1 Optical Z-Connections

Figure 8.16 shows an optical Z-connection model. Waveguides that are 4 µm wide are in the upper and lower layers. The gap between the waveguides of the adjacent layers is 16 µm. The waveguides are connected by two 45° reflectors and a vertical waveguide that is 4 µm wide. The reflectors can be metal mirrors, dielectric multilayer wavelength filters, gratings, or photonic crystals. In the present work, metal mirrors with a refractive index of 0.4 for the real part and −5 for the imaginary part are assumed. Analysis is performed by the BPM/FDTD method coupled simulation. It can be seen in Figure 8.16 that the propagating light beam smoothly propagates from the upper layer to the lower layer through optical Z-connection with little mode disturbance with respect to intensity. Calculated loss of the optical Z-connection (γ_z) is 0.97 dB. The loss is basically induced at the mirror reflection parts.

8.3.4.2 Optical Switches

Optical switches for 3D-MOSS should be small and exhibit high speed and low cross-talk characteristics. At the same time, the switches should be stable against thermal and dimensional fluctuations since a large number of optical switches are involved in 3D-MOSS, say, 5120 2 × 2 switches in 1024 × 1024 Banyan network. This implies that flux-controlled switches are preferable to phase-controlled switches, giving us digital optical switches, internal total reflection switches, variable well optical ICs (VWOICs), and WPD optical switches as candidates. In the present simulation, we selected the WPD optical switches consisting of PLZT as mentioned in Section 8.3.3.

8.3.5.1 Size and insertion loss

For 3D-MOSS with S_SW and D_3D, connection areas 1 to D_3D have vertical optical connections while connection areas D_3D + 1 to S_SW − 1 have in-plane optical connections. The connection area length for the in-plane connection areas and the vertical connection areas are respectively expressed by Equations (8.2) and (8.4), and the width by Equations (8.3) and (8.5). Therefore, total 3D-MOSS length L3D-MOSS, width

Major losses in 3D-MOSS are listed in Table 8.4. Propagation loss γ_P of optical waveguides is assumed to be 0.5 dB/cm, which is typical in fluorinated polyimide. Loss induced at a right-angle waveguide–waveguide cross point γ_CR is estimated by the beam propagation method (BPM) simulation to be 0.0088 dB. Loss of an optical Z-connection γ_Z of 0.97 dB was calculated in Section 8.3.4. Since a pair of corner turnings with two mirrors has the same structure as the optical Z-connection, the loss γ_CT can also be 0.97 dB. A cross point of a vertical waveguide and a layer gap of 4 µm can be regarded as a kind of right-angle waveguide–waveguide cross point. So, loss at a layer gap γ_G is estimated to be 0.0088 dB. BPM calculation reveals that γ_G with 25% misalignment is 0.89 dB, and γ_G with 25% misalignment is 0.14 dB when SOLNET is used for the coupling. Loss within a 2 × 2 optical switch γ_SW was estimated to be 1.7 dB in Section 6.1.3. Waveguide-switch coupling loss γ_W−S is basically 0 dB for no misalignment. For the case with 25% misalignment, the BPM calculation reveals that γ_W−S is 0.83 dB. For SOLNET coupling with 25% misalignment, similar to the case of γ_G, γ_W−S is 0.14 dB. In the present simulation, boundary reflection losses are neglected, assuming an antireflective (AR) coating on the edge surfaces of individual parts.

General expressions for eight kinds of losses in 3D-MOSS are derived in terms of the major losses listed in Table 8.4. The results are summarized in Table 8.5. In-plane optical connections include in-plane propagation, waveguide–waveguide cross points, pairs of corner turnings, optical switches, and waveguide–switch couplings. Vertical optical connections include vertical propagation, optical Z-connections, and layer gaps.

For total loss due to in-plane propagation, the first and the second terms are caused by the horizontal line length given by the second and the third terms of Equation (8.7). The third term is caused from line length perpendicular to the horizontal direction. Since lines in vertical connection areas have no contribution to the line length perpendicular to the horizontal direction basically, the summation is carried out only for the in-plane connection areas. For total loss due to waveguide–waveguide cross points, as shown in Figure 8.15(a), an optical waveguide has a cross-point count of N_C/2ⁱ in in-plane connection area i. In vertical connection areas, no waveguide cross points exist. Thus, the summation for the total loss calculation is carried out for the in-plane connection areas. Total loss due to corner turnings is determined by the number of pair of corner turnings that equals the in-plane connection area count since optical signals experience one pair of corner turnings in one in-plane connection area. Total loss within optical switches and total loss at waveguide–switch coupling points are respectively induced by S_SW optical switches and 2 S_SW waveguide–switch coupling points. For vertical propagation, as can be seen from Figure 8.13 and Figure 8.15(b), the total loss is determined by the optical path length that corresponds to two times the 3D-MOSS thickness. Since optical signals experience one optical Z-connection in one vertical connection area as shown in Figure 8.15(b), total loss caused by optical Z-connections, with adding two optical Z-connections for input and output, is calculated to be [2 + D_3D]γ_Z. Total loss due to layer gaps is determined by two times the layer gap count contained in a 3D-MOSS. When a SOLNET is implemented in vertical optical connections, total loss due to layer gaps is replaced with a product of total Z-connection count times γ_G for the SOLNET.

By substituting the parameters in Table 8.2 into Equations (8.7), (8.8), and (8.9), length, width, and height of 3D-MOSS can be respectively calculated to be 1.424 cm, 0.64 cm, and 0.08 cm as shown in Table 8.3. For conventional planar structures, the length is 3.252 cm, the width is 10.24 cm, and the height is 0.005 cm. Therefore, it is found that drastic occupation area reduction of 3/100 is achieved in 3D-MOSS with D_3D = 4. Insertion losses of 3D-MOSS, shown in Table 8.3, can be obtained by summation of the eight losses listed in Table 8.5. While insertion loss of the conventional planar structure is 43 dB, that of the 3D-MOSS is 29 dB, indicating that a 14-dB loss reduction is achieved in 3D-MOSS. In Figure 8.18, occupation areas and insertion losses of 3D-MOSS are shown as a function of D_3D [30]. D_3D = 0 implies conventional structure, and D_3D = 9 implies that all the connection areas consist of vertical optical connections. It is found that the occupation area decreases drastically with D_3D. Insertion loss, on the other hand, has a peak in the region of D_3D = 4~6. For small D_3D, the main contribution to the loss is waveguide–waveguide cross points while layer gaps for large D_3D. The results indicate that size and loss of 3D-MOSS can be optimized by selecting D_3D.

The misalignment issue is a serious concern in 3D-MOSS. As shown in Table 8.4, misalignment between adjacent layers causes a layer gap loss γ_G of 0.89 dB. At a waveguide–switch coupling, which is equivalent to a coupling between 4-µm-wide waveguides, 25% misalignment induces a loss γ_W−S of 0.83 dB. By substituting these loss values into the summation of the eight losses shown in Table 8.5, insertion loss of 3D-MOSS with 25% misalignment is estimated to be 73 dB as shown in Table 8.3. In this case, in order to transmit optical signals with reasonable power, three times optical amplification might be required in 3D-MOSS as a result of inserting amplifier layers. As can be seen in Figure 8.18, SOLNET implementation is effective to reduce the insertion loss. By using γ_G and γ_W−S of 0.14 dB listed in Table 8.4 for 25% misalignment using SOLNET, the insertion loss of the SOLNET-implemented 3D-MOSS is calculated to be 32 dB, which is close to the loss in 3D-MOSS without misalignment.

It was reported that high-accuracy bonding equipment enables layer stacking with positional accuracy of 1 µm for 1-cm² chips [31]. Therefore, for 3D-MOSS of 1.424 cm × 0.64 cm, it is consistent to assume maximum positional misalignment of ~1 µm, which corresponds to 25% misalignment for optical circuit backbones consisting of optical waveguides with 4 × 4-µm² core cross-sections. The insertion loss of 32 dB for 1024 × 1024 SOLNET-implemented 3D-MOSS is still high, which requires an optical amplifier layer insertion or 10 mW-order input light signals. For further simplification of the system, each loss listed in Table 8.4 should be decreased by optimizing individual structures and materials.

8.3.5.2 electrical characteristics

Switching speed and power consumption can be estimated based on the charge-discharge model for the prism-shaped capacitor in the waveguide prism deflector. The WPD optical switch model used in the present calculation is the same as the model shown in Figure 6.19 except that the PLZT thickness is increased from 400 nm to 4 µm and the applied voltage is increased from 1.2 V to 12V. Therefore, the capacitance C, switching speed τ, and power consumption Power that are given by Equations (6.9), (6.8), and (6.10) for one prism-shaped capacitor are respectively calculated to be 0.57 pF, 57 ps for driver on-resistivity R_ON = 100 Ω, and 41 mW at F = 5 × 10⁸ 1/s.

When the number of the waveguide prism deflectors in a WPD optical switch is NPrism, switching speed τ for R_ON is given by

For power consumption, total WPD optical switch count in a 3D-MOSS is (N_C / 2)S_SW, giving NPrism (N_C / 2)S_SW for the total count of the prism-shaped capacitors contained in a 3D-MOSS. Then, total capacitance arising from the deflectors is given by C NPrism (N_C / 2)S_SW. As a result, power consumption at a switching rate of F in a 3D-MOSS is expressed as follows:

By substituting C = 0.57 pF, V = 12 V, NPrism = 8, N_c = 1024, and S_SW = 10 into Equations (8.10) and (8.11), τ = 456 ps for R_ON = 100 Ω, and Power = 33 W for F = 1 × 10⁷ 1/s are obtained. The power consumption of 33 W corresponds to a power density of 36 W/cm² since the area of the 3D-MOSS model is 1.42 × 0.64 cm². This value is comparable to acceptable heat generation of 30 W/cm² reported by K. Takahashi [31] for stacked LSI of 1-cm² area. These results are included in Table 8.3.