That is it in a nutshell – now we can delve into the internals.

CFAs do not have the traditional differential amplifier input structure, thus they sacrifice the parameter matching inherent to that structure. The CFA circuit configuration prevents them from obtaining the precision of voltage-feedback amplifiers (VFAs), but the circuit configuration that sacrifices precision results in increased bandwidth and slew rate. The higher bandwidth is relatively independent of closed-loop gain, so the constant gain-bandwidth restriction applied to VFAs is removed for CFAs. The slew rate of CFAs is much improved from their counterpart VFAs because their structure enables the output stage to supply slewing current until the output reaches its final value. In general, VFAs are used for precision and general purpose applications, whereas CFAs are restricted to high-frequency applications above 100 MHz.

CFAs, unlike previous generation high-frequency amplifiers, have eliminated the AC coupling requirement; they are usually DC-coupled while they operate in the gigahertz range. CFAs have much faster slew rates than VFAs, so they have faster rise/fall times and less intermodulation distortion.

The output buffer provides low output impedance for the amplifier. Again, the output buffer gain, G_OUT, is very close to one, so it is neglected in the analysis. The output impedance of the output buffer is ignored during the calculations. This parameter may influence the circuit performance when driving very low impedance or capacitive loads, but this is usually not the case. The input buffer's output impedance cannot be ignored because affects stability at high frequencies.

The current-controlled current source, Z, is a transimpedance. The transimpedance in a CFA serves the same function as gain in a VFA; it is the parameter that makes the performance of the op amp dependent only on the passive parameter values. Usually the transimpedance is very high, in the MΩ range, so the CFA gains accuracy by closing a feedback loop in the same manner that the VFA does.

The circuit used for stability calculations is shown in Fig. 9.3 where the model of Fig. 9.1 is substituted for the CFA symbol. The input and output buffer gain, and output buffer output impedance have been deleted from the circuit to simplify calculations. This approximation is valid for almost all applications.

The transfer equation is given in Eq. (9.1), and the Kirchoff's law is used to write Eqs. (9.2) and (9.3).

Eqs. (9.2) and (9.3) are combined to yield Eq. (9.4).

Dividing Eq. (9.1) by Eq. (9.4) yields Eq. (9.5), and this is the open-loop transfer equation. This equation is commonly known as the loop gain.

Eq. (9.6) is the transfer equation, Eq. (9.7) is the current equation at the inverting node, and Eq. (9.8) is the input loop equation. These equations are combined to yield the closed-loop gain equation, Eq. (9.9).

When the input buffer output impedance, Z_B, approaches zero, Eq. (9.9) reduces to Eq. (9.10).

When the transimpedance, Z, is very high, the term Z_F/Z in Eq. (9.10) approaches zero, and Eq. (9.10) reduces to Eq. (9.11); the ideal closed-loop gain equation for the CFA. The ideal closed-loop gain equations for the CFA and VFA are identical, and the degree to which they depart from ideal is dependent on the validity of the assumptions. The VFA has one assumption that the direct gain is very high, whereas the CFA has two assumptions that the transimpedance is very high and that the input buffer output impedance is very low. As would be expected, two assumptions are much harder to meet than one, thus the CFA departs from the ideal more than the VFA does.

The current equation for the input node is written as Eq. (9.12). Eq. (9.13) defines the dummy variable, V_A, and Eq. (9.14) is the transfer equation for the CFA. These equations are combined and simplified leading to Eq. (9.15), which is the closed-loop gain equation for the inverting CFA.

When Z_B approaches zero, Eq. (9.15) reduces to Eq. (9.16).

When Z is very large, Eq. (9.16) becomes Eq. (9.17), which is the ideal closed-loop gain equation for the inverting CFA.

The ideal closed-loop gain equation for the inverting VFA and CFA op amps are identical. Both configurations have lower input impedance than the noninverting configuration has, but the VFA has one assumption, whereas the CFA has two assumptions. Again, as was the case with the noninverting counterparts, the CFA is less ideal than the VFA because of the two assumptions. The zero Z_B assumption always breaks down in bipolar junction transistors as is shown later. The CFA is almost never used in the differential amplifier configuration because of the CFA's gross input impedance mismatch.

Comparing Eqs. (9.9) and (9.15) to Eq. (9.18) reveals that the inverting and noninverting CFA op amps have identical stability equations. This is the expected result because stability of any feedback circuit is a function of the loop gain, and the input signals have no affect on stability. The two op amp parameters affecting stability are the transimpedance, Z, and the input buffer's output impedance, Z_B. The external components affecting stability are Z_G and Z_F. The designer controls the external impedance, although stray capacitance that is a part of the external impedance sometimes seems to be uncontrollable. Stray capacitance is the primary cause of ringing and overshoot in CFAs. Z and Z_B are CFA op amp parameters that cannot be controlled by the circuit designer, so he has to live with them.

Prior to determining stability with a Bode plot, we take the log of Eq. (9.18), and plot the logs (Eqs. 9.19 and 9.20) in Fig. 9.6.

This enables the designer to add and subtract components of the stability equation graphically.

The plot in Fig. 9.6 assumes typical values for the parameters:

The transimpedance has two poles, and the plot shows that the op amp will be unstable without the addition of external components because 20 LOG|Z| crosses the 0-dB axis after the phase shift is 180 degrees. Z_F, Z_B, and Z_G reduce the loop gain 61.1 dB, so the circuit is stable because it has 60 degrees phase margin. Z_F is the component that stabilizes the circuit. The parallel combination of Z_F and Z_G contributes little to the phase margin because Z_B is very small, so Z_B and Z_G have little effect on stability.

The manufacturer determines the optimum value of R_F during the characterization of the IC. Referring to Fig. 9.6, it is seen that when R_F exceeds the optimum value recommended by the IC manufacturer, stability increases. The increased stability has a price called decreased bandwidth. Conversely, when R_F is less than the optimum value recommended by the IC manufacturer, stability decreases, and the circuit response to step inputs is overshoot or possibly ringing. Sometimes the overshoot associated with less than optimum R_F is tolerated because the bandwidth increases as R_F decreases. The peaked response associated with less than optimum values of R_F can be used to compensate for cable droop caused by cable capacitance.

When Z_B = 0 Ω and Z_F = R_F the loop gain equation is Aβ = Z/R_F. Under these conditions, Z and R_F determine stability, and a value of R_F can always be found to stabilize the circuit. The transimpedance and feedback resistor have a major impact on stability, and the input buffer's output impedance has a minor effect on stability. Since Z_B increases with an increase in frequency, it tends to increase stability at higher frequencies. Eq. (9.18) is rewritten as Eq. (9.24), but it has been manipulated so that the ideal closed-loop gain is readily apparent.

The closed-loop ideal gain equation (inverting and noninverting) shows up in the denominator of Eq. (9.24), so the closed-loop gain influences the stability of the op amp. When Z_B approaches zero, the closed-loop gain term also approaches zero, and the op amp becomes independent of the ideal closed-loop gain. Under these conditions, R_F determines stability, and the bandwidth is independent of the closed-loop gain. Many people claim that the CFA bandwidth is independent of the gain, and that claim's validity is dependent on the ratios Z_B/Z_F being very low.

Z_B is important enough to warrant further investigation, so the equation for Z_B is given below.

At low frequencies h_ib = 50 Ω and R_B/(β₀ + 1) = 25, so Z_B = 75 Ω. Z_B varies in accordance with Eq. (9.25) at high frequencies. Also, the transistor parameters in Eq. (9.25) vary with transistor type; they are different for NPN and PNP transistors. Because Z_B is dependent on the output transistors being used, and this is a function of the quadrant the output signal is in, Z_B has an extremely wide variation. Z_B is a small factor in the equation, but it adds a lot of variability to the current-feedback op amp.

When the circuit designer must select a different R_F value from that recommended on the data sheet, he gets into stability or low bandwidth problems. Lowering R_F decreases stability, and increasing R_F decreases bandwidth. What happens when the designer needs to operate at a gain not specified on the data sheet? The designer must select a new value of R_F for the new gain, but there is no guarantee that new value of R_F is an optimum value. One solution to the R_F selection problem is to assume that the loop gain, Aβ, is a linear function. Then the assumption can be made that (Aβ)₁ for a gain of one equals (Aβ)_N for a gain of N, and that this is a linear relationship between stability and gain. Eqs. (9.26) and (9.27) are based on the linearity assumption.

Eq. (9.27) leads one to believe that a new value Z_F can easily be chosen for each new gain. This is not the case in the real world; the assumptions do not hold up well enough to rely on them. When you change to a new gain not specified on the data sheet, Eq. (9.27), at best, supplies a starting point for R_F, but you must test to determine the final value of R_F.

When the R_F value recommended on the data sheet cannot be used, an alternate method of selecting a starting value for R_F is to use graphical techniques. The graph shown in Fig. 9.7 is a plot of the typical 300 MHz CFA data given in Table 9.1.

Enter the graph at the new gain, say A_CL = 6, and move horizontally until you reach the intersection of the gain versus feedback resistance curve. Then drop vertically to the resistance axis and read the new value of R_F (500 Ω in this example). Enter the graph at the new value of R_F, and travel vertically until you intersect the bandwidth versus feedback resistance curve. Now move to the bandwidth axis to read the new bandwidth (75 MHz in this example). As a starting point you should expect to get approximately 75 MHz bandwidth with a gain of 6 and R_F = 500 Ω. Although this technique yields more reliable solutions than Eq. (9.27) does, op amp peculiarities, circuit board stray capacitances, and wiring make extensive testing mandatory. The circuit must be tested for performance and stability at each new operating point.

Eq. (9.29) is the stability equation when Z_G consists of a resistor in parallel with stray capacitance between the inverting input node and ground. The stray capacitance, C_G, is a fixed value because it is dependent on the circuit layout. The pole created by the stray capacitance is dependent on R_B because it dominates R_F and R_G. R_B fluctuates with manufacturing tolerances, so the R_BC_G pole placement is subject to IC manufacturing tolerances. As the R_BC_G combination becomes larger, the pole moves toward the zero frequency axis, lowering the circuit stability. Eventually it interacts with the pole contained in Z, 1/τ₂, and instability results.

The effects of stray capacitance on CFA closed-loop performance are shown in Fig. 9.8.

Notice that the introduction of C_G causes more than 3 dB peaking in the CFA frequency response plot, and it increases the bandwidth about 18 MHz. Two picofarads are not a lot of capacitance because a sloppy layout can easily add four or more picofarads to the circuit.

This loop gain transfer function contains a pole and zero, thus, depending on the pole/zero placement, oscillation can result. The Bode plot for this case is shown in Fig. 9.9. The original and composite curves cross the 0-dB axis with a slope of −40 dB/decade, so either curve can indicate instability. The composite curve crosses the 0-dB axis at a higher frequency than the original curve, hence the stray capacitance has added more phase shift to the system. The composite curve is surely less stable than the original curve. Adding capacitance to the inverting input node or across the feedback resistor usually results in instability. R_B largely influences the location of the pole introduced by C_F, thus here is another case where stray capacitance leads to instability.

Fig. 9.8 shows that C_F = 2 pF adds about 4 dB of peaking to the frequency response plot. The bandwidth increases about 10 MHz because of the peaking. C_F and C_G are the major causes of overshoot, ringing, and oscillation in CFAs, and the circuit board layout must be carefully done to eliminate these stray capacitances.

If the zero and pole in Eq. (9.33) are made to cancel each other, the only poles remaining are in Z. Setting the pole and zero in Eq. (9.33) equal yields Eq. (9.34) after some algebraic manipulation.

R_B dominates the parallel combination of R_B and R_G, so Eq. (9.34) is reduced to Eq. (9.35).

R_B is an IC parameter, so it is dependent on the IC process. R_B is an important IC parameter, but it is not important enough to be monitored as a control variable during the manufacturing process. R_B has widely spread, unspecified parameters, thus depending on R_B for compensation is risky. Rather, the prudent design engineer assures that the circuit will be stable for any reasonable value of R_B, and that the resulting frequency response peaking is acceptable.

The inverting input impedance is very high, but the noninverting input impedance is very low. This situation precludes CFAs from operation in the differential amplifier configuration. Stray capacitance on the inverting input node or across the feedback resistor always leads to peaking, usually to ringing, and sometimes to oscillations. A prudent circuit designer scans the PC board layout for stray capacitances, and he eliminates them. Breadboarding and lab testing are a must with CFAs. The CFA performance can be improved immeasurably with a good layout, good decoupling capacitors, and low inductance components.