Unfortunately, the number of resistors and switches doubles for each additional bit of resolution. This means that an 8-bit D/A converter would have 255 resistors and 256 switches, and a 16-bit D/A converter would have 65,535 resistors and 65,536 switches. For this reason, this architecture is almost never used for higher-resolution D/A converters.

The number of resistors and switches reduced to one per bit, but the range of the resistors is extremely wide for high-resolution converters, making it hard to fabricate all of them on the IC. The resistor used for B0 in Fig. 15.2 is the limiting factor for power dissipation from V_REF to ground.

This converter architecture is often used to make logarithmic converters. In this case, the R, 2R, 4R, 8R … resistors are replaced with logarithmically weighted resistors.

This type of converter, and the R/2R converter described in the next paragraph, uses a feedback resistor fabricated on the D/A IC itself. This feedback resistor is not an optional convenience for the designer—it is crucial to the accuracy of the D/A. It is fabricated on the same silicon as the resistor ladder. Therefore, it experiences the same thermal drift as the resistor ladder. The gain of the buffer amplifier is fixed, with a full-scale output voltage limited to V_REF. If a different full-scale D/A output voltage is needed, change V_REF. If the full-scale V_OUT must exceed the maximum rating of the D/A reference voltage, use a gain stage after the buffer op amp (see Section 15.7.2).

The op amp must be selected carefully, because it will be operated in much less than unity gain mode for some combinations of bits. This is probably one of the main reasons why this architecture is not popular, as well as the requirement for a wide range of resistor values for high-precision converters.

For a given reference voltage V_REF, a current I flows through resistor R. If two resistors, each the same value (2R), are connected from V_REF to ground, a current I/2 flows through each leg of the circuit. But the same current will flow if one leg is made up of two resistors, each with the value of R. If two resistors in parallel whose value is 2R replace the bottom resistor, the parallel combination is still R. I/4 flows through both legs, adding to I/2. Extending the network for 4 bits as shown on the right, the total current on the bottom leg is I/4 plus I/8 plus I/16 plus I/16 in the resistor to ground. Kirchhoff's current law is satisfied, and convenient tap points have been established to construct a D/A converter (Fig. 15.4):

This converter architecture has advantages over the types previously mentioned. The number of resistors has doubled from the number required for the current-summing type, but there are only two values. Usually, the 2R resistors are composed of two resistors in series, each with a value of R. The feedback resistor for the buffer amplifier is again fabricated on the converter itself for maximum accuracy. Although the op amp is still not operated in unity gain mode for all combinations of bits, it is much closer to unity gain with this architecture.

The important op amp parameters for all resistor ladder D/As are as follows:

Sigma delta converters are popular for audio frequencies, particularly CD players. The primary limiting factor is the sample clock. The original CD players operated at a sample rate of 44.1 kHz, which means that according to Nyquist sampling theory, the maximum audio frequency that can be reproduced is 22.05 kHz. If an audio frequency of 23.05 kHz is present in the recorded material, it will alias back into the audio output at 1 kHz—producing an annoying whistle. This places a tremendous constraint on the low-pass filter following the D/A in a CD player. It must reject all audio frequencies above 22.05 kHz while passing those up to 20 kHz, the commonly accepted upper limit of human hearing. While this can be done in conventional filter topologies, they are extremely complex (nine or more poles). Inevitably, phase shift and amplitude roll-off or ripple will start far below 20 kHz. The original CD players often sounded a bit “harsh” or “dull” because of this.

The solution was to overclock the sample clock. To keep things simple, designers made it a binary multiple of the original sampling frequency. Today, 8× or even higher oversampling is standard in CD players. Little do the audio enthusiasts know that the primary reason why this was done was not to improve the sound, it was done to substantially reduce the cost of the CD player! A faster sample clock is very cheap. Nine-pole audio filters are not. At 8× oversampling, the CD player only needs to achieve maximum roll-off at 352.8 kHz—a very easy requirement. Instead of the filter having to roll off in a mere 2 kHz of bandwidth, now it has 332 kHz of bandwidth to accomplish the roll-off. The sound of an oversampled CD player really is better, but it comes at the cost of increased radiated radio frequency interference, coming from the sample clock.

Sigma delta converters introduce a great deal of noise onto the power rails, because the internal digital circuitry is continually switching to the power supply rails at the sample clock frequency F_S.

Accuracy is the error in the analog output from the theoretical value for a given digital input. Errors are described in the next paragraph. A very common method of compensating for D/A error is to use a converter that has one or two bits more resolution than the application requires. With the cost of converters coming down, and more advanced models being introduced every day, this may be cost-effective.

The resolution of a converter is ±1/2 LSB, where an LSB is defined as:

The number of bits in a DC system determines the DC step size that corresponds to a bit. Table 15.1 shows the number of bits and the corresponding voltage step size for three popular voltages.

The bit step size can get critical, especially for portable equipment. There is a requirement to operate off of low voltage, to minimize the number of batteries. The buffer amplifier, if it includes gain, will use large resistor values, lowering its noise immunity. Fortunately, the vast majority of DC applications are not portable; they are in an industrial environment.

For example, a converter is used to position a drill on a table used to drill printed circuit board holes. The positions of the holes are specified as 0.001 in., ±0.0003 in. The actuators are centered on the table at 0 V, with full negative position of −12 in. occurring at −5 V, and full positive position of +12 in. occurring at +5 V. There are two actuators, one for vertical and one for horizontal.

This example has several aspects. The first is that the positioning voltage has to swing both positive and negative. In the real world, it may be necessary to add (or subtract in this case) a fixed offset to the D/A output. The output voltage has to swing over a 10 V range, which may mean that the output of the D/A has to be amplified. The actuators themselves probably operate off of higher current than the D/A is designed to provide. Section 15.7 covers some methods for meeting these requirements.

Assume, for now, that the D/A has the necessary offset and gain. A ±12 in. position is 24 in. total, which corresponds to ±5 V from the D/A circuitry. The 24 in. range must be divided into equal 0.0003 in. steps to meet the resolution requirement, which is 80,000 steps. From Table 15.1, an 18-bit D/A converter is required. The actual system will be able to position with a step size of 0.0000916 in. Two-independent conversion systems are needed, one for horizontal and one for vertical.

The number of converter bits, however, is the overwhelming factor determining these parameters. Technically, they are not “errors,” because the design of the converter sets them. If the designer cannot live with these design limits, the only choice is to specify a converter with better resolution (more bits).

The circuit in Fig. 15.16 has been employed for decades—many resources are available that can be used to design exact component values. It boosts current because the output impedance of the op amp has been bypassed and used as the driver for the base of the NPN and PNP power transistors. The two diodes compensate for the VBE drop in the transistors, whose bases are biased by two resistors off of the supplies. The output of the booster stage is fed back to the feedback resistor in the D/A to complete the feedback loop. The output impedance of the stage is only limited by the characteristics of the output transistors and small emitter resistors. Modern power transistors have such high-frequency response that this circuit may oscillate. The RC snubber network and a small inductor in series with the load can be used to damp the oscillation—or be omitted if oscillation is not a problem. Beware of varying transistor betas, however.

Anytime there are higher-voltage rails on the output section, there are potential hazards. The circuit above illustrates a common misapplication.

The problem with this is that the wattage of the resistors increases as the external voltage rail increases. The designer has control over the wattage of the external R_F, but has no control whatsoever over internal R_F or R_S. Because these resistors are fabricated on the IC, their wattage is limited. Even if the wattage rating of the internal resistors is meticulously observed, they may have undesirable thermal coefficients if allowed to dissipate that wattage. Resistor self-heating will change the resistance according to its rated temperature coefficient (maximum). The external resistor is sure to have a different thermal coefficient from the internal resistors, causing a gain error. The designer may never have encountered the effects of resistor self-heating before, because through-hole and surface mount devices have enough bulk to minimize the effect of self-heating. At the geometries present on IC D/As, resistor self-heating is a much more pronounced effect. It will produce a nonlinearity error in the D/A output.

This effect is most pronounced in high-resolution converters, where the geometry is the smallest. The designer, therefore, must limit the current in the feedback resistor if at all possible. Fig. 15.18 shows a method of achieving gain control while keeping the high-current path out of the internal feedback resistor.

If the combination of voltage swing and power ratings cannot be balanced to achieve a working design, the only choice left to the designer will be to break the feedback loop and live with the loss of accuracy. For AC applications, this may be acceptable.

Nevertheless, there may be applications that require a DC offset. The designer is fortunate in that there is already a precision reference available in the circuit. The reference drives the resistor network in the D/A and may be external or internal to it. In most cases, an internal reference is brought out to a pin on the device. It is important for the designer not to excessively load the reference, as that would directly affect D/A accuracy (Fig. 15.19).

In the circuit in Fig. 15.19, the output of the buffer amplifier is shifted up in DC level by 1/2 V_REF (not 1/2 V_CC). V_REF was selected because it is much more stable and accurate than V_CC. The four resistors in the level shifter circuit must be highly accurate and matched, or this circuit will contribute to gain and offset errors. Thermal errors, however, cannot be compensated for, because the external resistors are probably going to have a different thermal drift than those on the IC. This technique is limited to applications that will see only a small change in ambient temperature.