6.3.1 Current–Voltage Curves for Thyristors

A plot of the anode current (i_A) as a function of anode–cathode voltage (V_AK) is shown in Fig. 6.3. The forward-blocking mode is shown as the low-current portion of the graph (solid curve around operating point “ 1”). With zero gate current and positive v_ak, the forward characteristic in the off-or blocking-state is determined by the center junction J₂, which is reverse biased. At operating point “ 1” very little current flows (I_co only) through the device. However, if the applied voltage exceeds the forward-blocking voltage, the thyristor switches to its on- or conducting-state (shown as operating point “ 2”) because of carrier multiplication (M in Eq. (6.1)). The effect of gate current is to lower the blocking voltage at which switching takes place. The thyristor moves rapidly along the negatively-sloped portion of the curve until it reaches a stable operating point determined by the external circuit (point “ 2”). The portion of the graph indicating forward-conduction shows the large values of iA that may be conducted at relatively low values of V_AK, similar to a power diode.

FIGURE 6.3 Static characteristic i-v curve typical of thyristors.

As the thyristor moves from forward-blocking to forward-conduction, the external circuit must allow sufficient anode current to flow to keep the device latched. The minimum anode current that will cause the device to remain in forward-conduction as it switches from forward-blocking is called the latching current I_L. If the thyristor is already in forward-conduction and the anode current is reduced, the device can move its operating mode from forward-conduction back to forward-blocking. The minimum value of anode current necessary to keep the device in forward-conduction after it has been operating at a high anode current value is called the holding current I_H. The holding current value is lower than the latching current value as indicated in Fig. 6.3.

The reverse thyristor characteristic, quadrant III of Fig. 6.3, is determined by the outer two junctions (J₁ and J₃), which are reverse biased in this operating mode (applied V_AK is negative). Symmetric thyristors are designed so that J₁ will reach reverse breakdown due to carrier multiplication at an applied reverse potential near the forward breakdown value (operating point “ 3” in Fig. 6.3). The forward- and reverse-blocking junctions are usually fabricated at the same time with a very long diffusion process (10–50 h) at high temperatures (> 1200°C). This process produces symmetric blocking properties. Wafer edge termination processing causes the forward-blocking capability to be reduced to about 90% of the reverse-blocking capability. Edge termination is discussed below. Asymmetric devices are made to optimize forward-conduction and turn-off properties, and as such reach reverse breakdown at a lower voltage than that applied in the forward direction. This is accomplished by designing the asymmetric thyristor with a much thinner n-base than is used in symmetric structures. The thin n-base leads to improved properties such as lower forward drop and shorter switching times. Asymmetric devices are generally used in applications when only forward voltages (positive, v_ak) are to be applied (including many inverter designs).

The form of the gate–to-cathode i-v characteristic of SCRs, GTOs and IGCTs is similar to that of a diode. With positive gate bias, the gate–cathode junction is forward biased and permits the flow of a large current in the presence of a low voltage drop. When negative gate voltage is applied to an SCR, the gate–cathode junction is reverse biased and prevents the flow of current until the avalanche breakdown voltage is reached. In a GTO or IGCT, a negative gate voltage is applied to provide a low impedance path for anode current to flow out of the device instead of out the cathode. In this way the cathode region (base–emitter junction of the equivalent npn transistor) turns off, thus pulling the equivalent npn transistor out of conduction. This causes the entire thyristor to return to its blocking state. The problem with the GTO and IGCT is that the gate–drive circuitry is typically required to sink 10-50% (for the GTO) or 100% (for the IGCT) of the anode current to achieve turn-off.

6.3.2 Edge and Surface Terminations

Thyristors are often made with planar diffusion technology to create the cathode region. Formation of these regions creates cylindrical curvature of the metallurgical gate–cathode junction. Under reverse bias, the curvature of the associated depletion region results in electric field crowding along the curved section of the p⁺ diffused region. The field crowding seriously reduces the breakdown potential below that expected for the bulk semiconductor. A floating field ring, an extra p diffused region with no electrical connection at the surface, is often added to modify the electric field profile and thus reduce it to a value below or at the field strength in the bulk. An illustration of a single floating field ring is shown in Fig. 6.4. The spacing, W, between the main anode region and the field ring is critical. Multiple rings can also be employed to further modify the electric field in high-voltage rated thyristors.

FIGURE 6.4 Cross section showing a floating field ring to decrease the electric field intensity near the curved portion of the main anode region (left-most p⁺ region).

Another common method for altering the electric field at the surface is by using a field plate as shown in cross section in Fig. 6.5. By forcing the potential over the oxide to be the same as at the surface of the p⁺ region, the depletion region can be extended so that the electric field intensity is reduced near the curved portion of the diffused p⁺ region. A common practice is to use field plates with floating field rings to obtain optimum breakdown performance.

FIGURE 6.5 Cross section showing a field plate used to reduce the electric field intensity near the curved portion of the p⁺-region (anode).

High-voltage thyristors are made from single wafers of Si and must have edge terminations other than floating field rings or field plates to promote bulk breakdown and limit leakage current at the surface. Controlled bevel angles can be created using lapping and polishing techniques during production of large-area thyristors. Two types of bevel junctions can be created: (i) a positive bevel defined as one in which the junction area decreases when moving from the highly-doped to the lightly-doped side of the depletion region and (ii) a negative bevel defined as one in which the junction area increases when moving from the highly-doped to the lightly-doped side of the depletion region. In practice, the negative bevel must be lapped at an extremely shallow angle to reduce the surface field below the field intensity in the bulk. All positive bevel angles between 0 and 90° result in a lower surface field than in the bulk. Figure 6.6 shows the use of a positive bevel for the J₁ junction and a shallow negative bevel for the J₂ and J₃ junctions on a thyristor cross section to make maximum use of the Si area for conduction and still reduce the surface electric field. Further details of the use of beveling, field plates, and field rings can be found in Ghandi [2] and Baliga [3].

FIGURE 6.6 Cross section of a thyristor showing the negative bevel (upper p-n⁻ and p-n⁺ junctions) and positive bevel (lower p-n⁻ junction) used for edge termination of large-area devices.

6.3.3 Packaging

Thyristors are available in a wide variety of packages, from small plastic ones for low-power (i.e. TO-247), to stud-mount packages for medium-power, to press-pack (also called flat-pack) for the highest power devices. The press-packs must be mounted under pressure to obtain proper electrical and thermal contact between the device and the external metal electrodes. Special force-calibrated clamps are made for this purpose. Large-area thyristors cannot be directly attached to the large copper pole piece of the press-pack because of the difference in the coefficient of thermal expansion (CTE), hence the use of a pressure contact for both anode and cathode. Figure 6.7 shows typical thyristor stud-mount and press-pack packages.

FIGURE 6.7 Examples of thyristor packaging: stud-mount (left) and press-pack/capsule (right).

Many medium power thyristors are appearing in modules where a half- or full-bridge (and associated anti-parallel diodes) is put together in one package. A power module package should have five characteristics:

Electrical isolation of the baseplate from the semiconductor is necessary in order to contain both halves of a phase leg in one package as well as for convenience (modules switching different phases can be mounted on one heatsink) and safety (heatsinks can be held at ground potential).

Thermal performance is measured by the maximum temperature rise in the Si die at a given power dissipation level with a fixed heat sink temperature. The lower the die temperature, the better the package. A package with a low thermal resistance from junction-to-sink can operate at higher power densities for the same temperature rise or lower temperatures for the same power dissipation than a more thermally resistive package. While maintaining low device temperature is generally preferable, temperature variation affects majority carrier and bipolar devices differently. Roughly speaking, in a bipolar device such as a thyristor, switching losses increase and conduction losses decrease with increasing temperature. In a majority carrier device, such as a MOSFET, conduction losses increase with increasing temperature. The thermal conductivity of typical materials used in thyristor packages is shown in Table 6.1.

TABLE 6.1 Thermal conductivity of thyristor package materials

Electrical performance refers primarily to the stray inductance in series with the die, as well as the capability of mounting a low-inductance bus to the terminals. Another problem is the minimization of capacitive cross-talk from one switch to another, which can cause an abnormal on-state condition by charging the gate of an off-state switch, or from a switch to any circuitry in the package (as would be found in a hybrid power module). Capacitive coupling is a major cause of electromagnetic interference (EMI). As the stray inductance of the module and the bus sets a minimum switching loss for the device –because the switch must absorb the stored inductive energy –it is very important to minimize inductance within the module. Reducing the parasitic inductance reduces the high-frequency ringing during transients that is another cause of radiated electromagnetic interference. Since stray inductance can cause large peak voltages during switching transients, minimizing it helps to maintain the device within its safe area of operation.

Long life and high reliability are primarily attained through minimization of thermal cycling, minimization of ambient temperature, and proper design of the transistor stack. Thermal cycling fatigues material interfaces because of coefficient of thermal expansion (CTE) mismatch between dissimilar materials. As the materials undergo temperature variation, they expand and contract at different rates which stresses the interface between the layers and can cause interface deterioration (e.g. cracking of solder layers or wire debonding). Chemical degradation processes such as dendrite growth and impurity migration are accelerated with increasing temperature, so keeping the absolute temperature of the device low, as well as minimizing the temperature changes to which it is subjected is important. Typical CTE values for common package materials are given in Table 6.2.

TABLE 6.2 CTE for thyristor package materials

Low cost is achieved in a variety of ways. Both manufacturing and material costs must be taken into account when designing a power module. Materials that are difficult to machine or process, even if they are relatively cheap in raw form (molybdenum, for example), should be avoided. Manufacturing processes that lower yield also drive up costs. In addition, a part that is very reliable can reduce future costs by reducing the need for repair and replacement.

The basic half-bridge module has three power terminals: plus, minus and phase. Advanced modules differ from traditional high power commercial modules in several ways. The baseplate is metallized aluminum nitride (A1N) ceramic rather than the typical 0.125” thick nickel-plated copper baseplate with a soldered metallized ceramic substrate for electrical isolation. This A1N baseplate stack provides a low thermal resistance from die to heatsink. The copper terminal power busses are attached by solder to the devices in a wirebond-free, low-inductance, low-resistance, device interconnect configuration. The balance of the assembly is typical for module manufacturing with attachment of shells, use of dielectric gels, and hard epoxies and adhesive to seal the finished module. Details of the thermal performance of modules and advanced modules can be found in Beker et al. [4] and Godbold et al. [5].

6.4.1 Cathode Shorts

As the temperature in the thyristor increases above 25C, the minority carrier lifetime and the corresponding diffusion lengths in the n- and p-bases increase. This leads to an increase in the α’s of the equivalent transistors. Discussion of the details of the minority carrier diffusion length and its role in determining the current gain factor α can be found in Sze [7]. Referring to Eq. (6.1), it is seen that a lower applied bias will give a carrier multiplication factor M sufficient to switch the device from forward-blocking into conduction, because of this increase of the α’s with increasing temperature. Placing a shunt resistor in parallel with the base–emitter junction of the equivalent npn transistor (shown in Fig. 6.11) will result in an effective current gain, α_neff, that is lower than α_n, as given by Eq. (6.2), where V_GK is the applied gate–cathode voltage, R_S is the equivalent lumped value for the distributed current shunting structure, and the remaining factors form the appropriate current factor based on the applied bias and characteristics of the gate–cathode junction. The shunt current path is implemented by providing intermittent shorts, called cathode shorts, between the p-base (gate) region and the n⁺ -emitter (cathode) region in the thyristor as illustrated in Fig. 6.12. The lumped shunt resistance value is in the range of 1–15 Ω as measured from gate to cathode.

FIGURE 6.11 Two-transistor equivalent circuit showing the addition of a resistive shunt path for anode current.

FIGURE 6.12 Cross section showing cathode shorts and the resulting resistive shunt path for anode current.

(6.2)

Low values of anode current (e.g. those associated with an increase in temperature under forward-blocking conditions) will flow through the shunt path to the cathode contact, bypassing the n⁺ -emitter and keeping the device out of its forward-conduction mode. As the anode current becomes large, the potential drop across the shunt resistance will be sufficient to forward bias the gate–cathode junction, J₃, and bring the thyristor into forward-conduction. The cathode shorts also provide a path for displacement current to flow without forward biasing J₃. The dv/dt rating of the thyristor is thus improved as well as the forward-blocking characteristics by using cathode shorts. However, the shorts do cause a lowering of cathode current handling capability because of the loss of some of the cathode area (n⁺ -region) to the shorting pattern, an increase in the necessary gate current to obtain switching from forward-blocking to forward-conduction, and an increase in complexity of manufacturing of the thyristor. The loss of cathode area due to the shorting-structure is from 5 to 20%, depending on the type of thyristor. By careful design of the cathode short windows to the p-base, the holding current can be made lower than the latching current. This is important so that the thyristor will remain in forward-conduction when used with varying load impedances.

6.4.2 Anode Shorts

A further increase in forward-blocking capability can be obtained by introducing anode shorts in addition to the cathode shorts. This reduces α_p in a similar manner that cathode shorts reduce α_n. An illustration of this is provided in Fig. 6.13. In this structure both J₁ and J₃ are shorted (anode and cathode shorts), so that the forward-blocking capability of the thyristor is completely determined by the avalanche breakdown characteristics of J₂. Anode shorts will result in the complete loss of reverse-blocking capability and is only suitable for thyristors used in asymmetric circuit applications.

FIGURE 6.13 Cross section showing integrated cathode and anode shorts.

6.4.3 Amplifying Gate

The cathode-shorting structure will reduce the gate sensitivity dramatically. To increase this sensitivity and yet retain the benefits of the cathode-shorts, a structure called an amplifying gate (or regenerative gate) is used, as shown in Fig. 6.14 (and Fig. 6.9, right). When the gate current (1) is injected into the p-base through the pilot-gate contact, electrons are injected into the p-base by the n⁺ -emitter with a given emitter injection efficiency. These electrons traverse through the p-base (the time taken for this process is called the transit time) and accumulate near the depletion region. This negative charge accumulation leads to injection of holes from the anode. The device then turns on after a certain delay, dictated by the p-base transit time, and the pilot anode current (2) begins to flow through a small region near the pilot-gate contact as shown in Fig. 6.14.

FIGURE 6.14 Cross section showing the amplifying gate structure in a thyristor.

This flow of pilot anode current corresponds to the initial sharp rise in the anode current waveform (phase I), as shown in Fig. 6.15. The device switching then goes into phase II, during which the anode current remains fairly constant, suggesting that the resistance of the region has reached its lower limit. This is due to the fact that the pilot anode current (2) takes a finite time to traverse through the p-base laterally and become the gate current for the main cathode area. The n⁺ -emitters start to inject electrons which traverse the p-base vertically and after a certain finite time (transit time of the p-base) reach the depletion region. The total time taken by the lateral traversal of pilot anode current and the electron transit time across the p-base is the reason for observing this characteristic phase II interval. The width of the phase II interval is comparable to the switching delay, suggesting that the p-base transit time is of primary importance. Once the main cathode region turns on, the resistance of the device decreases and the anode current begins to rise again (transition from phase II to III). From this time onward in the switching cycle, the plasma spreading velocity will dictate the rate at which the conduction area will increase. The current density during phase I and II can be quite large, leading to a considerable increase in the local temperature and device failure. The detailed effect of the amplifying gate on the anode current rise will only be noticed at high levels of di/dt (in the range of 1000 A/μs), shown in Fig. 6.15. It can be concluded that the amplifying gate will increase gate sensitivity at the expense of some di/dt capability, as demonstrated by Sankaran [8]. This lowering of di/dt capability can be somewhat off-set by an increase in gate–cathode interdigitation as previously discussed.

FIGURE 6.15 Turn-on waveforms showing the effect of the amplifying gate in the anode current rise.

6.4.4 Temperature Dependencies

The forward-blocking voltage of an SCR has been shown to be reduced from 1350 V at 25°C to 950 V at –175C in a near linear fashion [8]. Above 25C, the forward-blocking capability is again reduced, due to changes in the minority carrier lifetime which cause the leakage current to increase and the associated breakover voltage to decrease. Several dominant physical parameters associated with semiconductor devices are sensitive to temperature variations, causing their dependent device characteristics to change dramatically. The most important of these parameters are: (i) the minority carrier lifetimes (which control the high-level injection lifetimes); (ii) the hole and electron mobilities; (iii) the impact ionization collision cross sections; and (iv) the free-carrier concentrations (primarily the ionized impurity-atom concentration). Almost all of the impurity atoms are ionized at temperatures above 0°C, and so further discussion of the temperature effects on ionization is not relevant for normal operation. As the temperature increases above 25°C, the following trends are observed: the carrier lifetimes increase, giving longer recovery times and greater switching losses; the carrier mobilities are reduced, increasing the on-state voltage drop; and at very high temperatures, the intrinsic carrier concentration becomes sufficiently high that the depletion layer will not form and the device cannot switch off. A more detailed discussion of these physical parameters is beyond the scope of this article, but references are listed for those persons interested in pursuing relevant information about temperature effects.

It is well known that charge carrier recombination events are more efficient at lower temperatures. This shows up as a larger potential drop during forward-conduction and a shorter recovery time during turn-off. A plot of the anode current during turn-off, at various temperatures, for a typical GTO is shown in Fig. 6.16.

FIGURE 6.16 Temperature effect on the anode current tail during turn-off.

An approximate relation between the temperature and the forward drop across the n-base of a thyristor is discussed in detail by Herlet [10] and Hudgins et al. [11]. Temperature dependent equations relating the anode current density, J_A and the applied anode–cathode voltage V_AK are also given in Reference [11]; these include the junction potential drops in the device, the temperature dependence of the bandgap energy, and the n-base potential drop. Data from measurements at forward current densities of approximately 100 A/cm² on a GTO rated for 1 kV symmetric blocking gives forward voltage drops of 1.7 V at − 50°C and 1.8 V at 150°C.

6.6.1 SCRs and GTOs

The highest power handling devices continue to be bipolar thyristors. High powered thyristors are large diameter devices, some well in excess of 100 mm, and as such have a limitation on the rate of rise of anode current, a di/dt rating. The depletion capacitances around the p–n junctions, in particular the center junction J₂, limit the rate of rise in forward voltage that can be applied even after all the stored charge, introduced during conduction, is removed. The associated displacement current under application of forward voltage during the thyristor blocking state sets a dv/dt limit. Some effort in improving the voltage hold-off capability and over-voltage protection of conventional SCRs is underway by incorporating a lateral high resistivity region to help dissipate the energy during breakover. Most effort, though, is being placed in the further development of high performance GTOs and IGCTs because of their controllability and to a lesser extent in optically triggered structures that feature gate circuit isolation.

High voltage GTOs with symmetric blocking capability require thick n-base regions to support the high electric field. The addition of an n+ buffer layer next to the p+anode allows high voltage forward-blocking and a low forward voltage drop during conduction because of the thinner n-base required. Cylindrical anode shorts have been incorporated to facilitate excess carrier removal from the n-base during turn-off and still retain the high blocking capability. This device structure can control 200 A, operating at 900 Hz, with a 6 kV hold-off. Some of the design tradeoff between the n-base width and turn-off energy losses in these structures have been determined. A similar GTO incorporating an n⁺-buffer layer and a pin structure has been fabricated that can control up to 1 kA (at a forward drop of 4 V) with a forward blocking capability of 8 kV. A reverse conducting GTO has been fabricated that can block 6 kV in the forward direction, interrupt a peak current of 3 kA and has a turn-off gain of about 5.

The IGCT is a modified GTO structure. It is designed and manufactured so that it commutâtes all of the cathode current away from the cathode region and diverts it out of the gate contact. The IGCT is similar to a GTO in structure except that it always has a low-loss n-buffer region between the n-base and p-emitter. The IGCT device package is designed to result in a very low parasitic inductance and is integrated with a specially designed gate–drive circuit. The gate drive contains all the necessary di/dt and dv/dt protection; the only connections required are a low-voltage power supply for the gate drive and an optical signal for controlling the gate. The specially designed gate drive and ring-gate package circuit allows the IGCT to be operated without a snubber circuit, and to switch with a higher anode di/dt than a similar GTO. At blocking voltages of 4.5 kV and higher the IGCT provides better performance than a conventional GTO. The speed at which the cathode current is diverted to the gate (di_GQ/dt) is directly related to the peak snubberless turn-off capability of the IGCT. The gate drive circuit can sink current for turn-off at di_GQ/dt values in excess of 7000 A/μs. This hard gate drive results in a low charge storage time of about 1 μs. The low storage time and the fail-short mode makes the IGCT attractive for high-power, high-voltage series applications; examples include high-power converters in excess of 100 MVA, static vol-ampere reactive (VAR) compensators and converters for distributed generation such as wind power.

6.6.2 MOS-controlled Thyristors

The cross section of the p-type MCT unit cell is given in Fig. 6.17. When the MCT is in its forward-blocking state and a negative gate–anode voltage is applied, an inversion layer is formed in the n-doped material that allows holes to flow laterally from the p-emitter (p-channel FET source) through the channel to the p-base (p-channel FET drain). This hole flow is the base current for the npn transistor. The n-emitter then injects electrons which are collected in the n-base, causing the p-emitter to inject holes into the n-base so that the pnp transistor is turned on and latches the MCT. The MCT is brought out of conduction by applying a positive gate–anode voltage. This signal creates an inversion layer that diverts electrons in the n-base away from the p-emitter and into the heavily doped n-region at the anode. This n-channel FET current amounts to a diversion of the pnp transistor base current so that its base–emitter junction turns off. Holes are then no longer available for collection by the p-base. The elimination of this hole current (npn transistor base current) causes the npn transistor to turn-off. The remaining stored charge recombines and returns the MCT to its blocking state.

FIGURE 6.17 Cross section of unit cell of a p-type MCT.

The seeming variability in fabrication of the turn-off FET structure continues to limit the performance of MCTs, particularly current interruption capability, though these devices can handle two to five times the conduction current density of IGBTs. Numerical modeling and its experimental verification show that ensembles of cells are sensitive to current filamentation during turn-off. All MCT device designs suffer from the problem of current interruption capability. Turn-on is relatively simple, by comparison; both the turn-on and conduction properties of the MCT approach the one-dimensional thyristor limit.

Other variations on the MCT structure have been demonstrated, namely the emitter switched thyristor (EST) and the dual-gate emitter switched thyristor (DG-EST) [12]. These comprise integrated lateral MOSFET structures which connect a floating thyristor n-emitter region to an n+ thyristor cathode region. The MOS channels are in series with the floating n-emitter region, allowing triggering of the thyristor with electrons from the n-base and interruption of the current to initiate turn-off. The DG-EST behaves as a dual-mode device, with the two gates allowing an IGBT mode to operate during switching and a thyristor mode to operate in the on-state.

6.6.3 Static Induction Thyristors

A SITh or FCTh has a cross section similar to that shown in Fig. 6.18. Other SITh configurations have surface gate structures. The device is essentially a pin diode with a gate structure that can pinch-off anode current flow. High power SIThs have a sub-surface gate (buried-gate) structure to allow larger cathode areas to be utilized, and hence larger current densities are possible.

FIGURE 6.18 Cross section of a SITh or FCT.

Planar gate devices have been fabricated with blocking capabilities of up to 1.2 kV and conduction currents of 200 A, while step-gate (trench-gate) structures have been produced that are able to block up to 4 kV and conduct 400 A. Similar devices with a “Verigrid” structure have been demonstrated that can block 2 kV and conduct 200 A, with claims of up to 3.5 kV blocking and 200 A conduction. Buried-gate devices that block 2.5 kV and conduct 300 A have also been fabricated. Recently there has been a resurgence of interest in these devices for fabrication in SiC.

6.6.4 Optically Triggered Thyristors

Optically gated thyristors have traditionally been used in power utility applications where series stacks of devices are necessary to achieve the high voltages required. Isolation between gate drive circuits for circuits such as static VAR compensators and high voltage dc to ac inverters (for use in high voltage dc (HVDC) transmission) have driven the development of this class of devices, which are typically available in ratings from 5 to 8 kV. The cross section is similar to that shown in Fig. 6.19, showing the photosensitive region and the amplifying gate structures. Light-triggered thyristors (LTTs) may also integrate over-voltage protection.

FIGURE 6.19 Cross section of a light-triggered thyristors (LTT).

One of the most recent devices can block 6 kV forward and reverse, conduct 2.5 kA average current, maintain a di/dt capability of 300 A/μs and a dv/dt capability of 3000 V/s, with a required trigger power of 10 mW. An integrated light triggered and light quenched SITh has been produced that can block 1.2 kV and conduct up to 20 A (at a forward drop of 2.5 V). This device is an integration of a normally off buried-gate static induction photo-thyristor and a normally off p-channel darlington surface-gate static induction phototransistor. The optical trigger and quenching power required is less than 5 and 0.2 mW, respectively.

6.6.5 Bi-directional Thyristors

The BCT is an integrated assembly of two anti-parallel thyristors on one Si wafer. The intended applications for this switch are VAR compensators, static switches, soft starters and motor drives. These devices are rated up to 6.5 kV blocking. Crosstalk between the two halves has been minimized. A cross section of the BCT is shown in Fig. 6.20. Note that each surface has a cathode and an anode (opposite devices). The small gate–cathode periphery necessarily restricts the BCT to low-frequency applications because of its di/dt limit.

FIGURE 6.20 Cross section of a bi-directional control thyristor (BCT).

Low-power devices similar to the BCT, but in existence for many years, are the diac and triac. A simplified cross section of a diac is shown in Fig. 6.21. A positive voltage applied to the anode with respect to the cathode forward biases J₁, while reverse biasing J₂. J₄ and J₃ are shorted by the metal contacts. When J₂ is biased to breakdown, a lateral current flows in the p₂ region. This lateral flow forward biases the edge of J₃, causing carrier injection. The result is that the device switches into its thyristor mode and latches. Applying a reverse voltage causes the opposite behavior at each junction, but with the same result. Figure 6.21 also shows the i–v plot for a diac.

FIGURE 6.21 Cross section and i-v plot of a diac.

The addition of a gate connection, to form a triac, allows the breakover to be controlled at a lower forward voltage. Figure 6.22 shows the structure for the triac. Unlike the diac, this is not symmetrical, resulting in differing forward and reverse breakover voltages for a given gate voltage. The device is fired by applying a gate pulse of the same polarity relative to MT1 as that of MT2.

FIGURE 6.22 Cross section of a triac.

6.7.1 Snubber Circuits

To protect a thyristor, from a large di/dt during turn-on and a large dv/dt during turn-off, a snubber circuit is needed. A general snubber topology is shown in Fig. 6.23. The turn-on snubber is made by inductance L₁ (often L₁ is stray inductance only). This protects the thyristor from a large di/dt during the turn-on process. The auxiliary circuit made by R₁ and D₁ allows the discharging of L₁ when the thyristor is turned off. The turn-off snubber is made by resistor R₂ and capacitance C₂. This circuit protects a GTO from large dv/dt during the turn-off process. The auxiliary circuit made by D₂ and R₂ allows the discharging of C₂ when the thyristor is turned on. The circuit of capacitance C₂ and inductance L₁ also limits the value of dv/dt across the thyristor during forward-blocking. In addition, L₁ protects the thyristor from reverse over-currents. R₁ and diodes D₁, D₂ are usually omitted in ac circuits with converter-grade thyristors. A similar second set of L, C and R may be used around this circuit in HVDC applications.

FIGURE 6.23 Turn-on (top elements) and turn-off (bottom elements) snubber circuits for thyristors.

6.7.2 Gate Circuits

It is possible to turn on a thyristor by injecting a current pulse into its gate. This process is known as gating, triggering or firing the thyristor. The most important restrictions are on the maximum peak and duration of the gate pulse current. In order to allow a fast turn-on, and a correspondingly large anode di/dt during the turn-on process, a large gate current pulse is supplied during the initial turn-on phase with a large di_G/dt. The gate current is kept on, at lower value, for some times after the thyristor turned on in order to avoid unwanted turn-off of the device; this is known as the “back-porch” current. A shaped gate current waveform of this type is shown in Fig. 6.24.

FIGURE 6.24 Gate current waveform showing large initial current followed by a suitable back-porch value.

Figure 6.25 shows typical gate i-v characteristics for the maximum and minimum operating temperatures. The dashed line represents the minimum gate current and corresponding gate voltage needed to ensure that the thyristor will be triggered at various operating temperatures. It is also known as the locus of minimum firing points. On the data sheet it is possible find a line representing the maximum operating power of the thyristor gating internal circuit. The straight line, between V_GG and V_GG/R_G, represents the current voltage characteristic of the equivalent trigger circuit. If the equivalent trigger circuit line intercepts the two gate i–v characteristics for the maximum and minimum operating temperatures between where they intercept the dashed lines (minimum gate current to trigger and maximum gate power dissipation), then the trigger circuit is able to turn-on the thyristor at any operating temperature without destroying or damaging the device.

FIGURE 6.25 Gate i-v curve for a typical thyristor.

In order to keep the power circuit and the control circuit electrically unconnected, the gate signal generator and the gate of the thyristor are often connected through a transformer. There is a transformer winding for each thyristor, and in this way unwanted short circuits between devices are avoided. A general block diagram of a thyristor gate–trigger circuit is shown in Fig. 6.26. This application is for a standard bridge configuration often used in power converters.

FIGURE 6.26 Block diagram of a transformer-isolated gate drive circuit.

Another problem can arise if the load impedance is high, particularly if the load is inductive and the supply voltage is low. In this situation, the latching current may not be reached during the trigger pulse. A possible solution to this problem could be the use of a longer current pulse. However, such a solution is not attractive because of the presence of the isolation transformer. An alternative solution is the generation of a series of short pulses that last for the same duration as a single long pulse. A single short pulse, a single long pulse and a series of short pulses are shown in Fig. 6.27. Reliable gating of the thyristor is essential in many applications.

FIGURE 6.27 Multiple gate pulses used as an alternative to one long current pulse.

There are many gate trigger circuits that use optical isolation between the logic-level electronics and a drive stage (typically MOSFETs) configured in a push-pull output. The dc power supply voltage for the drive stage is provided through transformer isolation. Many device manufacturers supply drive circuits available on printed circuit (PC) boards or diagrams of suggested circuits.

IGCT gate drives consist of an integrated module to which the thyristor is connected via a low-inductance mounting; an example is given in Fig. 6.28. Multiple MOSFETs and capacitors connected in parallel may be used to source or sink the necessary currents to turn the device on or off. Logic in the module controls the gate drive from a fiber-optic trigger input, and provides diagnostic feedback from a fiber-optic output. A simple power supply connection is also required.

FIGURE 6.28 Typical layout of an IGCT gate drive.

6.9.1 DC–AC Utility Inverters

Three-phase converters can be made in different ways, according to the system in which they are employed. The basic circuit used to construct these topologies –the three-phase controlled rectifier –is shown in Fig. 6.32.

FIGURE 6.32 A three-phase controlled bridge circuit used as a basic topology for many converter systems.

Starting from this basic configuration, it is possible to construct more complex circuits in order to obtain high-voltage or high-current outputs, or just to reduce the output ripple by constructing a multi-phase converter. One of the most important systems using the topology shown in Fig. 6.32 as a basic circuit is the HVDC system represented in Fig. 6.33. This system is made by two converters, a transmission line, and two ac systems. Each converter terminal is made of two poles. Each pole is made by two six-pulse line-frequency converters connected through Δ-Y and Y-Y transformers in order to obtain a twelve-pulse converter and a reduced output ripple. The filters are required to reduce the current harmonics generated by the converter.

FIGURE 6.33 A HVDC transmission system.

When a large amount of current and relatively low voltage is required, it is possible to connect in parallel, using a specially designed inductor, two six-pulse line-frequency converters connected through ?-? and Y-Y transformers. The special inductor is designed to absorb the voltage between the two converters, and to provide a pole to the load. This topology is shown in Fig. 6.34. This configuration is often known as a twelve-pulse converter. Higher pulse numbers may also be found.

FIGURE 6.34 Parallel connection of two six-pulse converters for high current applications.

6.9.2 Motor Control

Another important application of thyristors is in motor control circuits. Historically thyristors have been used heavily in traction, although most new designs are now based on IGBTs. Such motor control circuits broadly fall into four types: i) chopper control of a dc motor from a dc supply; ii) single- or three-phase converter control of a dc motor from an ac supply; iii) inverter control of an ac synchronous or induction machine from a dc supply and iv) cycloconverter control of an ac machine from an ac supply. An example of a GTO chopper is given in Fig. 6.35. L₁, R₁, D₁, and C₁ are the turn-on snubber; R₂, D_2, and C₂ are the turn-off snubber; finally R₃ and D₃ form the snubber for the freewheel diode D₃. A thyristor cycloconverter is shown in Fig. 6.36; the waveforms show the fundamental component of the output voltage for one phase. Three double converters are used to produce a three-phase variable-frequency, variable voltage sinusoidal output for driving ac motors. However, the limited frequency range (less than a third of the line frequency) restricts the application to large, low-speed machines at high powers.

FIGURE 6.35 GTO chopper for dc motor control.

FIGURE 6.36 Cycloconverter for control of large ac machines.

A single- or three-phase thyristor converter (controlled rectifier) may be used to provide a variable dc supply for controlling a dc motor. Such a converter may also be used as the front end of a three-phase induction motor drive. The variable voltage, variable frequency motor drive requires a dc supply, which is supplied by the thyristor converter. The drive may use a square-wave or PWM voltage source inverter (VSI), or a current source inverter (CSI). Figure 6.37 shows a square-wave or PWM VSI with a controlled rectifier on the input side. The switch block inverter may be made of thyristors (usually GTOs or IGCTs) for high power, although most new designs now use IGBTs. Low-power motor controllers generally use IGBT inverters.

FIGURE 6.37 PWM or square-wave inverter with a controlled rectifier input.

In motor control, thyristors are also used in CSI topologies. When the motor is controlled by a CSI, a controlled rectifier is also needed on the input side. Figure 6.38 shows a typical CSI inverter. The capacitors are needed to force the current in the thyristors to zero at each switching event. This is not needed when using GTOs. This inverter topology does not need any additional circuitry to provide the regenerative braking (energy recovery when slowing the motor). Historically, two back-to-back connected line-frequency thyristor converters have been employed to allow bi-directional power flow, and thus regenerative braking. Use of anti-parallel GTOs with symmetric blocking capability, or the use of diodes in series with each asymmetric GTO, reduces the number of power devices needed, but greatly increases the control complexity.

FIGURE 6.38 CSI on the output section of a motor drive system using capacitors for power factor correction.

6.9.3 VAR Compensators and Static Switching Systems

Thyristors are also used to switch capacitors or inductors in order to control the reactive power in the system. Such arrangements may also be used in phase-balancing circuits for balancing the load fed from a three-phase supply. Examples of these circuits are shown in Fig. 6.39. These circuits act as static VAR controllers. The topology represented on the left of Fig. 6.39 is called a thyristor-controlled inductor (TCI) and it acts as a variable inductor where the inductive VAR supplied can be varied quickly. Because the system may require either inductive or capacitive VAR compensation, it is possible to connect a bank of capacitors in parallel with a TCI. The topology shown on the right of Fig. 6.39 is called a thyristor-switched capacitor (TSC). Capacitors can be switched out by blocking the gate pulse of all thyristors in the circuit. The problem of this topology is the voltage across the capacitors at the thyristor turn-off. At turn-on the thyristor must be gated at the instant of the maximum ac voltage to avoid large over-currents. Many recent SVCs have used GTOs.

FIGURE 6.39 Per phase TCI and TSC system.

A similar application of thyristors is in solid-state fault current limiters and circuit breakers. In normal operation, the thyristors are continuously gated. However, under fault conditions they are switched rapidly to increase the series impedance in the load and to limit the fault current. Key advantages are the flexibility of the current limiting, which is independent of the location of the fault and the change in load impedance, the reduction in fault level of the supply, and a smaller voltage sag during a short-circuit fault.

A less important application of thyristors is as a static transfer switch, used to improve the reliability of uninterruptible power supplies (UPS) as shown in Fig. 6.40. There are two modes of using the thyristors. The first leaves the load permanently connected to the UPS system and in case of emergency disconnects the load from the UPS and connects it directly to the power line. The second mode is opposite to the first one. Under normal conditions the load is permanently connected to the power line, and in event of a line outage, the load is disconnected from the power line and connected to the UPS system.

FIGURE 6.40 Static transfer switch used in an UPS system.

6.9.4 Lighting Control Circuits

An important circuit used in lighting control is the dimmer, based on a triac and shown in Fig. 6.41. The R–C network applies a phase shift to the gate voltage, delaying the triggering of the triac. Varying the resistance, controls the firing angle of the triac and therefore the voltage across the load. The diac is used to provide symmetrical triggering for the positive and negative half-cycles, due to the non-symmetrical nature of the triac. This ensures symmetrical waveforms and elimination of even harmonics. An L–C filter is often used to reduce any remaining harmonics.

FIGURE 6.41 Basic dimmer circuit used in lighting control.