DC Transfer Functions

When the switch turns ON, the current ramps up in the inductor according to the inductor equation V_ON=L×ΔI_ON/t_ON. The current increment during the on-time is ΔI_ON=(V_ON×t_ON)/L. When the switch turns OFF, the inductor equation V_OFF=L×ΔI_ΟΝ/t_OFF leads to a current decrement ΔI_OFF=(V_OFF×t_OFF)/L.

The current increment ΔI_ON must be equal to the decrement ΔI_OFF, so that the current at the end of the switching cycle returns to the exact value it had at the start of the cycle — otherwise we wouldn’t be in a repeatable (steady) state. Using this argument, we can derive the input–output (DC) transfer functions of the three topologies, as shown in Table 2.1. It is interesting to note that the reason why the transfer functions turn out different in each of the three cases can be traced back to the fact that the expressions for V_ON and V_OFF are different. Other than that, the derivation and its underlying principles remain the same for all topologies.

Table 2.1. Derivation of DC Transfer Functions of the Three Topologies.

The DC Level and the “Swing” of the Inductor Current Waveform

From V=L dI/dt, we get ΔI=V Δt/L. So, the “swinging” component of the inductor current “ΔI” is completely determined by the applied voltseconds and the inductance. Voltseconds is the applied voltage multiplied by the time it is applied for. To calculate it, we can either use V_ON times t_ON (where t_ON=D/f), or V_OFF times t_OFF (where t_OFF=(1−D)/f) — and we will get the same result (for that is how D gets defined in the first place!). But note also, that if we apply 10 V across a given inductor for 2 μs, we will get the same current swing ΔI, if we apply say, 20 V for 1 μs, or 5 V for 4 μs, and so on. So, for a given inductor, talking about either the voltseconds or the ΔI is effectively one and the same thing.

What does the voltseconds depend on? It depends on the input/output voltages (i.e. duty cycle) and time, via the switching frequency. Therefore, only by changing L, f, or D can we affect ΔI. Nothing else! See Table 2.2. In particular, changing the load current I_O does nothing to ΔI. I_O is therefore in effect, an altogether independent influence on the inductor current waveform. But what part of the inductor current does it specifically influence/determine? We will see that I_O is proportional to the average inductor current.

Table 2.2. How Varying the Inductance, Frequency, Load Current, and Duty Cycle Influence ΔI and I_DC.

(↑↓) indicates it increases and decreases over the range; (×) indicates no change; (↑(=)) indicates I_DC is increasing and is equal to I_O.

^a Maximum at D=0.5.

The inductor current waveform is considered to have another (independent) component besides its swing ΔI — it is the DC (average) level “I_DC,” defined as the level around which the swing ΔI takes place symmetrically — that is, ΔI/2 above it, and ΔI/2 below it. See Figure 2.1. Geometrically speaking, this is the “center of the ramp.” It is sometimes also called the “platform” or “pedestal” of the inductor current. The important point to note is that I_DC is based only on energy flow requirements — that is, the need to maintain an average rate of energy flow consistent with the input/output voltages and desired output power. So, if the “application conditions,” that is, the output power and the input/output voltages, do not change, there is in fact nothing we can do to alter this DC level — in that sense, I_DC is rather “stubborn” (see Figure 2.1). In particular

Figure 2.1: If D and I_O are fixed, I_DC cannot change.

To understand the last bullet above, we should note the following equations that we will derive a little later

The intuitive reason why the above relations are different is that in a Buck, the output is in series with the inductor (from the standpoint of the DC currents, the output capacitor contributes nothing to the DC current distribution), and therefore the average inductor current must at all times be equal to the load current. Whereas, in a Boost and Buck-Boost, the output is in series with the diode, and so the average diode current must equal the load current.

Therefore, if we keep the load current constant, and change only the input/output voltages (duty cycle), we can affect I_DC — in all cases except for the Buck. In fact, the only way to change the DC inductor current level for a Buck is to change the load current. Nothing else will work!

In the Buck, I_DC and I_O are equal. But in the Boost and Buck-Boost, I_DC depends also on the duty cycle. That makes the design/selection of magnetics for these two topologies rather different from a Buck. For example, if the duty cycle is 0.5, the average inductor current is twice the load current. Therefore, using a 5 A inductor for a 5 A load current may be a recipe for disaster. But for a Buck it is OK except for high-voltage applications (discussed later).

One thing we can be sure of is that in the Boost and Buck-Boost, I_DC is always greater than the load current. We may be able to cause this DC level to fall and even approach the load current value if we reduce the duty cycle close to 0 (i.e., a very small difference between the input and output voltages). But then, on increasing the duty cycle toward 1, the DC level of the inductor current will climb steeply. It is important we recognize this clearly and early on.

Another thing we can conclude with certainty is that in all the topologies, the DC level of the inductor current is proportional to the load current. So, doubling the load current for example (keeping everything else the same), doubles the DC level of the inductor current (whatever it was to start with). So, in a Boost with a duty cycle of 0.5 for example, if we have a 5 A load, then the I_DC is 10 A. And if I_O is increased to 10 A, I_DC will become 20 A.

Changing the input/output voltages (i.e. duty cycle) does affect the DC level of the inductor current for the Boost and the Buck-Boost. Changing D also affects the swing ΔΙ in all three topologies, because it changes the duration of the applied voltage and thereby changes the voltseconds. Summarizing:

Note: The off-line Forward converter transformer is probably the only known exception to the above logic. We will learn that if we, for example, double the duty cycle (i.e., double t_ON), then almost coincidentally, V_ON halves, and therefore the voltseconds does not change (and nor does ΔI). In effect, ΔI is then independent of duty cycle.

Based on the discussions above, and also the detailed design equations, we have summarized these “variations” in Table 2.2. This table should hopefully help the reader eventually develop a more intuitive and analytical “feel” for converter and magnetics design, one which can come in handy at a later stage. We will continue to discuss certain aspects of this table, in more detail, a little later.

Defining the AC, DC, and Peak Currents

In Figure 2.2, we see how the AC, DC, peak-to-peak, and peak values of the inductor current waveform are defined. In particular, we note that the AC value of the current waveform is defined as

Figure 2.2: The AC, DC, peak, and peak-to-peak currents, and the current ripple ratio “r” defined.

We should also note from Figure 2.2 that I_L ≡ I_DC. Therefore, sometimes in our discussions that follow, we may refer to the DC level of the inductor current as “I_DC ” and sometimes as the average inductor current “Ι_L ” but they are actually synonymous. In particular, we should not get confused by the subscript “L” in “I_L.” The “L” stands for inductor, not load. The load current is always designated as “I_O.” Of course, we do realize that I_L=I_O for a Buck, but that is just happenstance.

In Figure 2.2 we have also defined another key parameter called “r,” or the “current ripple ratio.” This connects the two independent current components I_DC and ΔI. We will explore this particular parameter in much greater detail a little later. Here, it suffices to mention that r needs to be set to an “optimum” value in any converter — usually approximately 0.3–0.5, irrespective of the specific application conditions, the switching frequency, and even the topology itself. This, therefore, becomes a universal design rule of thumb. We will also learn that the choice of r affects the current stresses and dissipation in all the power components, and thereby impacts their selection. Therefore, setting r should be the first step when commencing any power converter design.

The DC level of the inductor current (largely) determines the I²R losses in the copper windings (‘copper loss’). However, the final temperature of the inductor is also affected by another term — the “core loss” — that occurs inside the magnetic material (core) of the inductor. Core loss is, to a first approximation, determined only by the AC (swinging) component of the inductor current (ΔI), and is therefore virtually independent of the DC level (I_DC or “DC bias”).

We must pay the closest attention to the peak current. Note that in any converter, the terms “peak inductor current,” “peak switch current,” and “peak diode” current are all synonymous. Therefore, in general, we just refer to all of them as simply the “peak current” I_PK where

The peak current is in fact the most critical current component of all — because it is not just a source of long-term heat buildup and consequent temperature rise, but a potential cause of immediate destruction of the switch. We will show later that the inductor current is instantaneously proportional to the magnetic field inside the core. So, at the exact moment when the current reaches its peak value, so does this field. We also know that real-world inductors can “saturate” (start losing their inductance) if the field inside them exceeds a certain “safe” level — that value being dependent on the actual material used for the core (not on the geometry, or number of turns or even the air-gap, for example). Once saturation occurs, we may get an almost uncontrolled surge of current passing through the switch — because, the ability to limit current (which is one of the reasons the inductor is used in switching power supplies in the first place), depends on the inductor behaving like one. Therefore, losing inductance is certainly not going to help! In fact, we usually cannot afford to allow the inductor to “saturate” even momentarily. And for this reason, we need to monitor the peak current closely (usually on a cycle-by-cycle basis). As indicated, the peak is the likeliest point of the inductor current waveform where saturation can start to occur.

Note: A slight amount of core saturation may turn out to be acceptable on occasion, especially if it occurs only under temporary conditions, like power-up for example. This will be discussed in more detail later.

Understanding the AC, DC, and Peak Currents

We have seen that the AC component (I_AC=ΔI/2) is derivable from the voltseconds law. From the basic inductor equation V=L dI/dt, we get

So, the current swing I_PP ≡ ΔI, can be intuitively visualized as “voltseconds per unit inductance.” If the applied voltseconds doubles, so does the current swing (and AC component). And if the inductance doubles, the swing (and AC component) is halved.

Let us now consider the DC level again. Note that any capacitor has zero average (DC) current through it in steady state, so all capacitors can be considered to be “missing altogether” when calculating DC current distributions. Therefore, for a Buck, since energy flows into the output during both the on-time and off-time, and via the inductor, the average inductor current must always be equal to the load current. So,

On the other hand, in both the Boost and the Buck-Boost, energy flows into the output only during the off-time, and via the diode. Therefore, in this case, the average diode current must be equal to the load current. Note that the diode current has an average value equal to I_L when it is conducting (see the dashed line passing through the center of the down-ramp in the upper half of Figure 2.3). But if we calculate the average of this diode current over the entire switching cycle, we need to weight it by its duty cycle, that is, 1−D. Therefore, calling “I_D” the average diode current, we get

solving

Figure 2.3: Visualizing the AC and DC components of the inductor current as input voltage varies.

Note also, that for any topology, a high-duty cycle corresponds to a low-input voltage, and a low-duty cycle is equivalent to a high input. So, increasing D amounts to decreasing the input voltage (its magnitude) in all cases. Therefore, in a Boost or Buck-Boost, if the difference between the input and output voltages is large, we get the highest DC inductor current.

Finally, with the DC and AC components known, we can calculate the peak current using

Defining the “Worst-Case” Input Voltage

So far, we have been implicitly assuming a fixed input voltage. In reality, in most practical applications, the input voltage is a certain range, say from “V_INMIN” to “V_INMAX.” We therefore also need to know how the AC, DC, and peak current components change as we vary the input voltage. Most importantly, we need to know at what specific voltage within this range we get the maximum peak current. As mentioned, the peak is critical from the standpoint of ensuring there is no inductor saturation. Therefore, defining the “worst-case” voltage (for inductor design) as the point of the input voltage range where the peak current is at its maximum, we need to design/select our inductor at this particular point always. This is in fact the underlying basis of the “general inductor design procedure” that we will be presenting soon.

We will now try to understand where and why we get the highest peak currents for each topology. In Figure 2.3, we have drawn various inductor current waveforms to help us better visualize what really happens as the input is varied. We have chosen two topologies here, the Buck and the Buck-Boost, for which we display two waveforms each, corresponding to two different input voltages. Finally, in Figure 2.4 we have plotted out the AC, DC, and peak values. Note that these plots are based on the actual design equations, which are also presented within the same figure. While interpreting the plots, we should again keep in mind that for all topologies, a high D corresponds to a low input. The following analysis will also explain certain cells of the previously provided Table 2.2, where the variations of ΔI and I_DC, with respect to D, were summarized.

Figure 2.4: Plotting how the AC, DC, and peak currents change with duty cycle.

The Current Ripple Ratio “r”

In Figure 2.2, we first introduced the most basic, yet far-reaching design parameter of the power supply itself — its current ripple ratio “r.” This is a geometrical ratio that compares and connects the AC value of the inductor current to its associated DC value. So,

Here, we have used ΔI=2×I_AC. Once r is set by the designer (at maximum load current and worst-case input), almost everything else is pre-ordained — like the currents in the input and output capacitors, the “RMS” (root mean square) current in the switch, and so on. Therefore, the choice of r affects component selection and cost, and it must be understood clearly, and picked carefully.

Note that the ratio r is defined for CCM (continuous conduction mode) operation only. Its valid range is from 0 to 2. When r is 0, ΔI must be 0, and the inductor equation then implies a very large (infinite) inductance. Clearly, r=0 is not a practical value! If r equals 2, the converter is operating at the boundary of continuous and discontinuous conduction modes (boundary conduction mode or “BCM”) (see Figure 1.9 and Figure 2.5). In this so-called boundary (or “critical”) conduction mode, I_AC=I_DC by definition. Note that readers can refer back to Chapter 1, in which CCM, DCM (discontinuous conduction mode), and BCM were all initially introduced and explained.

Figure 2.5: BCM and forced CCM operating modes.

Note that an exception to the “valid” range of r from 0 to 2 occurs in “forced CCM” mode, discussed in more detail later.

Relating r to the Inductance

We know that current swing is given as voltseconds per unit inductance. So, we can also write

Here “Et” is defined as the (magnitude of the) voltmicroseconds across the inductor (either during the on-time or off-time — both being necessarily equal in steady state), and L_μH is the inductance in μΗ. The reason for defining Et is that this number is simply easier to manipulate than voltseconds because of the very small time intervals involved in modern power conversion.

Therefore, the current ripple ratio is

Note also that from now on, whenever L is paired up with Et in any given equation, we will drop the subscript of L, that is, “μΗ.” It will then be “understood” that L is in μΗ.

Finally, we have the following key relationships between r and L:

Incidentally, the preceding equation, that is, the one involving V_OFF, assumes CCM, because it assumes that t_OFF (the time for which V_OFF is applied) is equal to the full available off-time (1−D)/f.

Conversely, L as a function of r is

In subsequent sections we will often use the following easy-to-remember form of the previous equations. We are going to nickname this the “L×I” equation (or rule)

But perhaps we are still wondering — why do we even need to talk in terms of r — why not talk directly in terms of L? We do realize from the above equations that L and r are related. However, the “desirable” value of inductance depends on the specific application conditions, the switching frequency, and even the topology. So, it is just not possible to give a general design rule for picking L. But there is in fact such a general design rule of thumb for selecting r — one that applies almost universally. We mentioned that it should be approximately 0.3–0.5 in all cases. And that is why it makes sense to calculate L by first setting the value of r. Of course, once we pick r, L gets automatically determined for a given set of application conditions and switching frequency.

The Optimum Value of r

It can be shown that, in terms of overall stresses in a converter and size, r ≈ 0.4 represents an “optimum” of sorts. We will now try to understand why this is so, and later we will try to point out exceptions to this reasoning.

The size of an inductor can be thought of as being virtually proportional to its energy-handling capability (the effect of air-gap on size will be studied later). So, for example, we probably already know intuitively that we need bigger cores to handle higher powers. The energy-handling capability of the selected core must, at a bare minimum, match the energy we need to store in it in our application — that is, . Otherwise, the inductor will saturate. (Later, read Chapter 5 to understand the related topology-dependency aspect.)

In Figure 2.6, we have plotted the energy, , as a function of r. We see that it has a “knee” at around 0.4. This tells us that if we try to reduce r much lower than 0.4, we will certainly need a very large inductor. On the other hand, if we increase r, there isn’t much greater reduction in the size of the inductor. In fact, we will see that beyond r ~ 0.4, we enter a region of diminishing returns.

Figure 2.6: How varying the current ripple ratio r affects all the components.

In Figure 2.6, we have also plotted the capacitor RMS currents for a Buck converter. We see that if r is increased beyond 0.4, the currents will increase significantly. This will lead to increased heat generation inside the capacitors (and other related components too). Eventually, we may be forced to pick a capacitor with a lower ESR and/or lower case-to-air thermal resistance (more expensive/bigger).

Note: The RMS value of the current through any component is the current component responsible for the heat developed in it — via the equation P=I_RMS²×R, where P is the dissipation, and R is the series resistance term associated with the particular component (e.g., the DC resistance (DCR) of an inductor, or the ESR of a capacitor). However, it can be shown that the switch, diode, and inductor RMS current values are not very “shape-dependent.” Therefore, the heat developed in them does not depend much on r , but mainly on the average value of the current. On the other hand, the RMS of the capacitor current waveforms can increase significantly, if r is increased. So, capacitor currents are very “shape-dependent,” and therefore depend strongly on r. The reason for that is fairly obvious — any capacitor in a steady state has zero average (DC) current through it. Since a capacitor effectively subtracts out the DC level of the accompanying current waveform, we are left with a capacitor current waveform that has a large “ramp portion” built-in into it. Therefore, changing r changes this ramp portion, thereby impacting the capacitor current greatly.

Note that in Figure 2.6, though we have used the Buck topology as an example, the energy curve in particular is exactly the same for any topology. The capacitor current curves though, may not be identical to those of the Buck, but are similar, and so the conclusions above still apply.

Therefore, in general, a current ripple ratio of around 0.4 is a good design target for any topology, any application, and any switching frequency.

Later, we will discuss some reasons/considerations for not adhering to this r~0.4 rule of thumb (under certain conditions).

Do We Mean Inductor? or Inductance?

Note that in the previous section, we said nothing explicitly about what the inductance was — we just talked about the size of the inductor. We know that in theory, we can put almost any number of turns on a given core, and get almost any inductance. So, inductance and size of inductor are not necessarily related. However, we will now see that in power conversion they often do turn out to be so, though rather indirectly.

Looking at Figure 2.6, we can see that a smaller r will require a higher energy-handling capability, and thus a larger inductor. Let us now formally go through all the possible ways of reducing r.

Since we are assuming our application conditions are fixed, the load current and input/output voltages are also fixed. Therefore, I_DC is fixed too. The only way we can cause r to decrease under these circumstances is to make ΔI smaller. However, ΔI is

But we know the applied voltseconds is fixed too (input and output voltages being fixed). So, the only way to decrease r (for a given set of application conditions) is to increase the inductance. We can therefore conclude that if we choose a high inductance, we will invariably require a bigger inductor. It is therefore no surprise that when power supply designers instinctively ask for a “large inductance,” they might well mean a “large inductor.” Therefore, the designer is cautioned against being too “ripple-phobic” in their designs. A certain amount of ripple is certainly “healthy.”

However, we must not forget that if, for example, we increase the load current (i.e., a change in application conditions), and we will clearly need to move to a larger inductor (with greater energy-handling capability). But simultaneously, we will need to decrease the inductance. That’s because I_DC will increase, and so to keep to the “optimum” value of r, we will need to increase ΔI in the same proportion as the increase in I_DC. And to do this, we have to decrease, rather than increase, L.

This highlights the importance of thinking in terms of r to ease power supply design.

How Inductance and Inductor Size Depend on Load Current

For all topologies, if we double the load current (keeping input/output voltages and D fixed), r will tend to halve since ΔI has not changed but I_DC has doubled. Therefore, to restore r to its optimum value of 0.4, we need to get ΔI to double too. But we know that ΔI is simply “voltseconds per unit inductance,” and in this case the voltseconds has not changed. So, the only way to get ΔI to double is to halve the inductance.

How Vendors Specify the Current Rating of an Off-the-shelf Inductor and How to Select It

The “energy-handling capability” of an inductor, 1/2×LI², is one way of picking the size of the inductor. But most vendors do not provide this number upfront. However, they do provide one or more “current ratings” for us to decipher. And if we interpret these current rating(s) correctly, that serves the purpose.

The current rating may be expressed by the vendor either as a maximum rated I_DC, or a maximum rated I_RMS, or/and a maximum I_SAT. The first two are usually considered synonymous, since the RMS and DC values of a typical inductor current waveform are almost equal (we had indicated previously that the RMS of the inductor current is not very “shape-dependent”). So, the DC/RMS rating of an inductor is by definition basically the direct current we can pass through it, such that we get a specified temperature rise (typically 40–55°C depending on the vendor). The last rating, that is, the I_SAT, is the maximum current we can pass, just before the core starts saturating. At that point, the inductor is considered close to the useful limit of its energy-storing capability.

We will also find that many, if not most, vendors have chosen the wire gauge in such a manner that the I_DC and I_SAT ratings of any inductor are also virtually the same. And by doing this, they can publish one (single) current rating — for example, “the inductor is rated for 5 A.” Basically, having determined the I_SAT of the inductor, the vendor has then consciously tweaked the wire gauge (at the saturation current level), so as to also get the specified temperature rise.

The rationale for wanting to set I_DC=I_SAT is as follows — suppose the inductor had a DC rating of 3 A and an I_SAT of 5 A. The 5-A rating is then likely to be superfluous, because users would probably never select this inductor for an application that required more than 3 A anyway. Therefore, the excessive I_SAT rating in this case essentially amounts to an unnecessarily over-sized core. Of course, if we do find an inductor with different I_DC and I_SAT ratings, it is also possible the vendor may have (unsuccessfully) tried to exploit the larger size of the chosen core (by increasing the wire thickness), but the stumbling block was that the selected core geometry was somehow not conducive to doing so — maybe it just did not have enough window space for accommodating the thicker windings.

In general, an inductor with a “single” current rating is usually the most optimum/cost-effective too.

However, in some rare off-the-shelf inductors, we may even find I_SAT stated to be less than I_DC. But what use is that? We can’t operate beyond I_SAT in any case! So, the only advantage, if any, that can be gleaned from such an inductor is that the temperature rise in a real application will be less than the maximum specified. Automotive applications?

In general, for most practical purposes, the current rating of the inductor that we need to consider is the lowest rating of all the published current ratings. We can usually simply ignore all the rest.

There are some subtle considerations and exceptions to the argument for always preferring an inductor with I_DC ≈ I_SAT. For example, under transient/temporary conditions, the momentary current may exceed the normal steady operating current by a wide margin. So, for example, suppose we are using a switcher with an internally fixed current limit “I_CLIM” or “I_LIM” of 5 A — in a 3-A application. Then under startup (or sudden line/load steps), the current is very likely to hit the limiting value of 5 A for several cycles in succession as the control circuitry struggles to bring up the output rail into regulation. We will discuss this issue in greater detail below — in particular, whether this is even a concern to start with! However, assuming for now that it is, it then seems that it may actually make sense to use an inductor rated for 3 A continuous current, with an I_SAT rating of 5 A (provided such an inductor is freely available, and cheap). Of course, alternatively, we could just pick a standard “5 A inductor” (for the 3-A application), and thereby we would certainly avoid inductor saturation under all conditions (and the consequent likelihood of switch destruction). But we realize that in doing so, our inductor may be considered slightly over-designed from the viewpoint of its copper/temperature rise — the wire being unnecessarily thicker. However, we should keep in mind that larger cores certainly affect cost, but a little more copper rarely does!

What Is the Inductor Current Rating We Need to Consider for a Given Application?

Whenever we start-up, or subject the converter to sudden line/load transients, the current no longer stays at the steady value it has under normal operation (i.e., when delivering the required maximum rated load current). For example, if we suddenly short the output the control circuitry in an effort to regulate the output may momentarily expand the duty cycle to the highest permissible value (as set by the controller). We then are no longer in steady state, and so under the increased on-time voltseconds, the current ramps up progressively, and can reach the set current limit.

But then, the inductor would probably be saturating! For example, if we are using a 5-A fixed current limit Buck switcher IC for a 3-A application, we have probably picked an inductor rated for only around 3 A. But when we short the output, the current momentarily hits the current limit (which may be set typically around 5.3 A for a “5-A Buck switcher”).

So the question is — should we select an inductor with a rating based on the current limit threshold (that it may encounter under severe transients), or simply on the basis of the maximum continuous normal operating current (under steady state operation in our application)? In fact, this question is not as philosophical as it may seem — it virtually separates standard industry off-line design procedures from those of DC–DC converters. To answer it effectively, a lot of factors may need to be considered, often on an individual or case-by-case basis. Let us address some of these concerns next.

Luckily, in most low-voltage applications, a certain amount of core saturation doesn’t cause any problem. The reason for this is that if in the above example, the switch is rated for 5 A, and the current-limiting circuit in the IC is known to act fast enough to prevent the current from ever rising beyond 5 A, then even if the inductor has started saturating as it gets to 5 A, there is no cause for concern — after all, if the switch doesn’t break, we don’t have a problem! And since the current doesn’t exceed 5 A, the switch cannot break. Hence, in this case, we could certainly pick a cost-effective “3-A inductor” for our application, knowing well in advance that it would saturate somewhat under various non-steady conditions. Of course we don’t want to operate a switching converter constantly (under its rated maximum load conditions) with a saturating inductor — we just “allow” it to do so under abnormal and temporary conditions, so long as we are sure that the switch can never be damaged.

However, the above logic begs another key question to be answered — what exactly constitutes “fast enough” — that is, which factors affect our ability to turn the switch OFF fast enough to protect it from the consequences of a saturating inductor? Since this consideration may eventually end up dictating the size and cost of the inductor, it is important to understand this response-time issue well.

Figure 2.7: How higher voltages combined with inherent response-time delays can cause overstress in the switch when the inductor starts saturating.

The Spread and Tolerance of the Current Limit

Any specification, including the current limit, either set by the user or fixed internally in the IC, will have a certain inherent tolerance band — that includes spreads over process variations and over temperature. All these variations are combined together inside the electrical tables of the datasheet of the device, under its “MIN” and “MAX” limits. In a practical converter design, a good designer learns to pay heed to such spreads.

But let us first summarize the general procedure for selecting the inductance for a switching power converter. Then we will look at the practical issues concerning spreads/tolerance.

The normal procedure is to determine the inductance by requiring that the current ripple ratio is about 0.4 — because we know that it represents an optimum of sorts for the entire converter. But there may be another possible limitation when dealing with switcher ICs, especially those with internally set (fixed) current limits — if our normal operating peak currents are close to the set current limit of the device (i.e., we are operating close to the maximum current capability of the switcher IC), we need to ensure that the inductance is large enough not to cause the calculated operating peak current (within any given cycle) to exceed the current limit — otherwise foldback (reduction in output voltage) will occur at the current limit threshold, and so the maximum output power cannot be guaranteed.

For example, if we have a “5-A Buck switcher IC,” being operated at 5-A load, with an r of 0.4, then the normal operating peak current is 5×(1+0.4/2)=5×1.2=6 A. So ideally, we would want the current limit of the device to be at least 6 A. Unfortunately, when we come to such integrated switchers, that much “margin” is rarely available — manufacturers always like to “bolster” the advertised ratings of their parts to be close to the maximum stress limits. So yes, if this particular part was declared to be a “4-A IC” instead of a “5-A IC,” we would have been just fine. But as things stand, manufacturers usually pay scant regard as to what may constitute an optimum rating for the device, in relationship to its associated components and the overall design strategy. Therefore, for example, a certain commercial “5-A switcher IC” may have a published (set) current limit of only 5.3 A. But on analysis, we see that it allows only 0.3 A above, and 0.3 A below, the average level of 5 A. Therefore, the maximum allowed ΔI at 5 A load is only 0.6 A. And the maximum r is 0.6/5=0.12 (when operated at a load current of 5 A). We can see that it is clearly much less than the optimum r of 0.4. And no doubt, this lowered r will adversely impact the size of the inductor (and converter). So is it truly a 5-A IC?

Now we take up the issue of the spread in current limit. I_CLIM actually has two limits — I_CLIM__MIN and I_CLIM__MAX (i.e., the MIN and MAX of the current limit, respectively). The question is — which of these limits should we consider for designing the inductor?

But unfortunately, when dealing with fixed current limit (integrated) switchers, we will find that this “nice-to-have transient headroom” may be a luxury we just can’t afford — because in most cases, the MIN current limit is set only slightly higher than the declared “rating” of the device. First, a 20% headroom may not be available! Under these conditions, to try to forcibly create some “headroom for good transient response” by increasing the inductance, becomes counterproductive — a large inductance takes even more time for its current to ramp up, and thereby effectively slows down the transient (loop) response — opposite to what we were hoping to achieve here! Therefore, we almost always end up ignoring this desirable 20% or so step-response headroom/margin, especially when dealing with integrated switcher ICs.

As for the MAX of the current limit, whenever we deem that inductor saturation is of real concern to us (as in high-voltage applications), we must look at the MAX of the current limit to decide upon the size of the inductor — that being the worst-case in terms of peak current under overloads, inductor energy storage, and its possible saturation.

Therefore, in general, in high-voltage DC–DC (or in off-line) applications, the MIN of the current limit may sometimes need to be considered when selecting inductance (as when operating close to current limit), but the MAX of the current limit will certainly always be used to determine the size of the inductor.

As a corollary, manufacturers of (low-voltage) DC–DC converter ICs actually need not (and probably justifiably do not) struggle too hard to minimize the spreads and tolerances of current limit (provided of course the MIN of the current limit is at least set high enough not to intrude on the declared power-handling capability of the IC). And for low-voltage DC–DC converter applications, the current limit is typically ignored by users — the final selection of inductor current rating (and size) is simply based on the cycle-by-cycle peak inductor current under normal (steady) operation (i.e., the maximum load of the application, at the worst-case input voltage end).

On the other hand, manufacturers of off-line switcher ICs do need to maintain a tight tolerance on the current limit. In their case, the maximum power-handling capability of their particular device is in effect dependent only on the ‘MIN” (minimum limit) of the current limit specification, whereas, the transformer size is determined entirely by the “MAX” of the current limit specification. So, in this case, a “loose” current limit specification effectively amounts to requiring bigger components (transformer) for the same maximum power-handling capability.

Note: Some makers of off-line integrated switcher ICs (e.g., the “TOPSWITCH^®” from Power Integrations) often tout their “precise” current limit — thus suggesting that we get the best power-to-size ratio (i.e., converter power density) when using their products. However, we should remember that in most cases, their product families have a discrete set of fixed current limits. And that is a problem! For example, we may have devices available with current limits in steps of 2 A, 3 A, 4 A, and so on. So yes, we may indeed get a higher power density when operating at the maximum rated output power of a particular IC. But when operating at a power level between available current limits, we are not going to get an optimum solution. For example, in an application where the peak current is 2.2 A, then we would need to select the 3 A current limit part, and we will need to design our magnetics to avoid core saturation at 3 A. So in effect, we have a very imprecise current limit now! The best solution is to look for a part (integrated switcher or controller plus MOSFET solution) where we can precisely set the current limit externally, depending upon our application.

With all these subtle considerations in mind, a designer can hopefully pick a more appropriate inductor current rating for his or her application. Clearly, there are no hard and fast rules. Engineering judgment needs to be applied as usual, and perhaps some further bench-testing may also be needed to validate the final choice of inductor.

In the worked examples that follow, the general approach and design procedure will become clearer.

Worked Example (1)

A Boost converter has an input range of 12–15 V, a regulated output of 24 V, and a maximum load current of 2 A. What would be a reasonable goal for its inductance, if the switching frequency is (a) 100 kHz, (b) 200 kHz, and (c) 1 MHz? What is the peak current in each case? And what is the energy-handling requirement?

The first thing we have to remember is that for this topology (as for the Buck-Boost), the worst-case is the lowest end of the input range, since that corresponds to the highest duty cycle and thus the highest average current I_L=I_O/(1−D). So, for all practical purposes, we can completely disregard V_INMAX here — in fact it was a red herring to start with, for this particular analysis!

From Table 2.1, the duty cycle is

Therefore,

Let us target a current ripple ratio of 0.4. So,

To calculate the inductance corresponding to the chosen value of r, we can use the following equation (presented previously). We also note from Table 2.1 that V_ON=V_IN for the Boost. Therefore, for f=100 kHz

For f=200 kHz, we would get half of this, that is, 18.75 μΗ. And for f=1 MHz, we get 3.75 μΗ. We clearly see that high frequencies lead to smaller inductances.

We have previously observed that for a given application, small inductances invariably lead to small inductors. Therefore, we conclude that on increasing the switching frequency, we will get smaller-sized inductors too. And that is the basic reason for hiking up switching frequencies in general.

The energy-handling requirement, if desired, can be explicitly calculated in each case, by using .

So far, we have been generally targeting r=0.4 as an optimum value. Let us now understand all the reasons why this may not be a good choice on occasion.

Worked Examples (2, 3, and 4)

Buck: Suppose we have an input of 15–20 V, an output of 5 V, and a maximum load current of 5 A. What is the recommended inductance if the switching frequency is 200 kHz?

Summarizing, we need a 9 μΗ/6 A inductor (or closest available).

Boost: Suppose we have an input of 5–10 V, an output of 25 V, and a maximum load current of 2 A. What is the recommended inductance if the switching frequency is 200 kHz?

Summarizing, we need a 4.7 μΗ/12 A inductor (or closest available).

Buck-Boost: Suppose we have an input of 5–10 V, an output of −25 V output, and a maximum load current of 2 A. What is the recommended inductance if the switching frequency is 200 kHz?

Summarizing, we need a 4.3 μΗ/14.4 A inductor (or closest available).

Worked Example (5) — When Not to Increase the Number of Turns

Note that the voltage-independent equation is useful if, for example, we want to do a quick check to see if our core may be saturating. Suppose we are custom-designing our inductor. We have wound 40 turns on a core with an area of A=2 cm². Its measured inductance is 200 μΗ, and the peak inductor current in our given application is 10 A. Then the peak flux density can be calculated as follows:

Note that we have converted the area to m² in the above equation, because we are using the MKS version of the equation.

For most ferrites, an operating flux density of 0.25 T is acceptable, since the saturation flux density is typically around 0.3 T.

Based on the B and I linearity, we can also linearly extrapolate and thus conclude that the peak current in our application should under no condition be allowed to exceed (0.3/0.25)×10=12 A, because at 12 A, the field will be 0.3 T, and the core will then start to saturate.

But note that the number of turns should not be increased any further (at 12 A). Looking at the Β_PK equation above, it seems at first sight that increasing the number of turns will reduce the B-field. However, inductance increases as N² (from the A_L equation given previously); so, the numerator will increase much faster than the denominator. Therefore, in reality, the B-field will increase, rather than decrease if we increase the number of turns, and we know we can’t afford to exceed 0.3 T.

In other words — we usually tend to instinctively rely on the current-limiting properties of an inductor. And in general, increasing the inductance will certainly help increase the inductance, and therefore help limit the current. However, if we are already close to the energy-storage limits of the material of the core, we have to be very careful — a few extra turns could take us “over the edge” (saturation), and then in fact, the inductance will start collapsing rather than increasing.

We should also not forget our basic premise of inductors in power conversion — for a given application, a large inductance does usually end up requiring a large inductor! So, increasing the number of turns, without increasing the size, may naturally turn out to be a recipe for disaster.

Worked Example (6) — Characterizing an Off-the-Shelf Inductor in a Specific Application

Now we will present the “general inductor design procedure” we have been talking about. We will be considering a wide-input voltage range here. The procedure is to be carried out at the “worst-case input voltage end” with respect to the peak current. The basic purpose is to ensure that we are avoiding inductor saturation under normal operation. So for the Buck, we will work at V_INMAX, because that is the point at which the peak current is at its maximum. For a Boost or a Buck-Boost, we need to conduct this procedure at V_INMIN, not V_INMAX, since that is the worst-case input voltage end with regard to the peak current, for these topologies.

The procedure will be illustrated by means of a step-by-step worked example. Though it is carried out for a Buck, throughout the calculation, we will indicate precisely how the procedure and equations may need to change, were this a Boost or a Buck-Boost. So for example, to the right of any equation presented below, we have indicated in brackets, which topology it is valid for.

A Buck converter has an input of 18–24 V, an output of 12 V, and a maximum load of 1 A. We desire a current ripple ratio of 0.3 (at maximum load). We assume V_SW=1.5 V, V_D=0.5 V, and f=150,000 Hz. An off-the-shelf inductor is to be selected and characterized for this application.

As mentioned, all the steps involved in the “general inductor design procedure” below are being carried out at a certain “V_IN” — which is the maximum input voltage for a Buck, and minimum input voltage for a Boost or a Buck-Boost.

This completes the general inductor design procedure.

Calculating “Other” Worst-case Stresses and their Selection Criteria

Having validated our choice of inductor, we can look a little more closely at the important issue of how the wide-input range impacts the other key parameters and stresses in our proposed converter. This also helps in correctly selecting the other power components.