5.10 Characteristic Impedance and the Error Budget

A part of the error budget must include errors caused by variations in characteristic impedance. When series terminations are used, the signal level and the termination resistor must match the line impedance. A mismatch produces an error signal. There are many other factors that influence the characteristic impedance of a trace. The obvious factors are variations in trace width, thickness, and spacing to the nearest conducting plane(s). The secondary effects that should be considered include the presence of nearby parallel traces. Nearby traces include side-by-side traces or traces on a nearby layer. Another source of error is the variation in dielectric constant across the board. Circuit board manufacturers are able to control the characteristic impedance of traces to within ± 10%. This may only be the impedance of a test strip and not the characteristic impedance of all traces. Test strips can also be applied to inner layers. It is up to the designer to request these strips. It is also up to the designer to interpret the manufacturer's claims correctly.

Terminating resistors may have a tolerance of about ± 10%. The driver source resistance and its tolerance must also be considered. When the errors related to resistor tolerance and characteristic impedance are equal, the logic level at the load can vary a maximum of ± 20%. Resistors that have a 20% tolerance will obviously use up more of the error budget. The effect of parasitic capacitance across the resistor was discussed earlier. To limit any resulting overshoot, a longer resistor is preferred over a stubby resistor. Unfortunately, a longer resistor alters the characteristic impedance of the transmission line path. In high speed circuits, the choice of resistor type should not be left to chance. Tests should be made to verify performance. The resistor type and the mounting treatment must be specified so that performance is repeatable.

Designers must be careful to specify all the materials used in the fabrication of their boards. There are different weaves of glass that can be impregnated with epoxy. This can have an effect on the way the dielectric constant varies across the board. If the error budget is tight then variations in board material could cause logic errors to exceed the budget. All of the board material detail used in a final product should be a part of the specifications. This way the board can be manufactured by a second supplier and the performance can be duplicated.

It is standard practice for board manufacturers to measure the characteristic impedance of test traces at 1 MHz. If the clock rates in the circuit are at 1 GHz, the dielectric constant at this frequency will be lower. As an example, the dielectric constant can drop 15–20% between 1 MHz and 1 GHz. Note that the characteristic impedance varies inversely to the square root of the dielectric constant. If the dielectric constant drops 16% in this range then the characteristic impedance rises 4%. This is the value that must be used in any error analysis.

Narrow traces are often specified to limit the layer count. The narrower the trace the more difficult it is to control characteristic impedance. This is related to the dimensional tolerances that can be maintained by the board manufacturer. As pointed out earlier, closer traces can also increase cross talk. Before narrower traces are accepted, a very careful net analysis is required.

Dielectric losses must be considered especially on longer trace runs. These losses tend to increase the rise time. The designer may want to test actual hardware to see how significant the signal delay, signal loss, and crosstalk will be. These tests can place limits on trace length to keep the signals within the error budget.