2.19 Stubs

A stub is a short section of transmission line, which is parallel connected to a longer or main transmission line. This configuration is shown in Figure 2.16.

Figure 2.16 A parallel terminated transmission line.

2.16

The stub allows a logic signal to be parallel connected to two different points in the circuit. In general, stubs are not terminated in a matching impedance. Stubs will often terminate at a gate on an IC. The termination will usually be slightly capacitive, but in our analysis, we will consider it as an open circuit.

N.B.
Stubs are sometimes referred to as loads, although they are not terminated.

N.B.
If a line plus its stub are shorter than one-quarter the distance a wave travels in one rise time then the delays caused by the stub will not be a problem.

At a clock rate of 1 GHz, the rise time must be less than 100 ps. The distance a wave travels in 100 ps is 1.5 cm. One-quarter of this distance is 0.375 cm. This means that in any realizable gigahertz circuitry, stubs should be avoided.

In Figure 2.17 that follows, the logic level is a nominal 1.0 V. In practical applications, this voltage must be scaled for the logic that is used. High speed logic voltage can be as low as 800 mV or as high as 3.5 V.

Figure 2.17 A stub added to a transmission line.

2.17

Figure 2.18 The signals on a serial terminated transmission line with a stub at its midpoint.

2.18

Case 3. The driver source impedance is zero and the main transmission line is series terminated in its characteristic impedance. Figure 2.17 shows wave forms for a stub at the midpoint of a line that is 20 ps long, where the stub is 10 ps long.

The initial wave that arrives at the stub divides into three equal waves. The first wave takes the path AB and arrives at the main line termination as 0.333 V. The next increase in voltage follows for a wave that takes the path ASSB. This wave adds 0.2 V to the termination after a delay of 40 ps. The wave taking the path AAAB makes a round trip to the stub and then continues to the termination. The path for the next wave to reach the load is ASSAAB or a delay of 60 ps. Two round trips to the source of voltage is a delay of 120 ps. If the initial rise time is added to this figure, it is easy to see how the total rise time is affected. The increased rise time is a function of where the stub is placed along the line and the length of the stub.

Case 4. The main line is parallel terminated at the logic termination. The terminating resistor matches the characteristic impedance of the transmission line. The waves that are reflected and returned to the main line are absorbed in this termination. The effect on rise time is about the same as Case 3.

N.B.
The increased rise time caused by a stub must be included in designing a logic circuit.

If an unterminated line has an unterminated stub, the reflections can, in some cases, become more than double the initial voltage. The rise time rule must be applied to the length of the line plus the length of the stub. It is interesting to place some numbers on the delays caused by stubs. Assume that the velocity of a wave is 0.015 cm/ps. A wave on a stub that is 1.5 cm long has a round trip time of 200 ps. More than one round trip on the stub is usually involved. The signal delay must be considered when timing clock signals. If the propagation time is 100 ps and the initial rise time is 30 ps, the delay if there are two round trips would be 530 ps. If a stub is very short then waves can make many round trips on the stub, while one round trip is made on the main line. This has the effect of filling the stub with energy, thus, reducing the delay caused by the stub.

N.B.
The delays caused by stubs can be significant. They must be included in designing a logic circuit.

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