5.17 Electrostatic discharge

Electrostatic discharge (ESD) is a source of interference that must be addressed in every design. ESD is a potent pulse of electromagnetic energy that is characterized as being 5 A with a rise time of 1 ns. This pulse of current creates a field that can destroy nearby components. The rise-time frequency is about 300 MHz. The near-field/far-field interface distance is about 16 cm. Near the pulse, the wave impedance is low and the wave energy is dominated by the magnetic field. Circuit damage is most likely when a field couples to a loop area that involves an input gate.

In most logic structures, the loop areas are very small, so it is difficult to couple any significant voltage into a surface-mounted IC. The larger loop areas are apt to involve decoupling capacitors, connectors, or other component connections. Note that a coupled voltage of 0.3 V is all that is needed to cause a clamping diode to conduct, and this could result in a logic error or even component damage. If the current pulse were to flow in a ground trace then common impedance coupling could add voltages that would destroy a component.

The first line of defense is to keep the pulse from using conductors in the circuit board. If the pulse can hit a cable, then the cable must be shielded. If the pulse can follow a circuit conductor then some sort of diode protection is needed to divert the current so that it does not enter a signal path. As an example, keyboards should have a conducting membrane to divert current to a shield structure.

N.B.
It is a good idea to view this problem in terms of field patterns. Conductors provide a path for fields to follow. Conductor geometry should be used to keep interfering fields from using the space around signal conductors.

In floating circuits, the effect of an ESD hit is to add charge to the entire structure. This charge will usually bleed off in air. If a transformer is used to charge a battery then some sort of high impedance path should be provided, so that any build up of charge can bleed off to earth around the transformer. This path can be 100 MΩ. If there is a local shield and there is no bleed path, then the circuit should be built so that any eventual arcing will take place in the transformer and not in the circuit.

The ESD field can enter into a metal enclosure through an aperture. A half wavelength at 300 MHz is about 50 cm. A 1-cm aperture will attenuate the field by a factor of 50, and this is usually not good enough. For this reason, apertures of all types should be closed by using gasket material or wave guide construction. Fans can use honeycombs to attenuate fields and still allow air passage. See “wave guide” in the “Glossary” of this chapter.

ESD pulses that flow along a shielded cable can couple into the signal leads. This coupling is related to the transfer impedance of the cable. The most likely coupling point is at the cable connector. In critical applications, connectors with back shells should be used.

To calculate the voltage induced into a loop near the pulse, first calculate the H field intensity by noting the distance from the current. Convert this H field to B field by using the permeability of free space as a multiplier. Then calculate the flux by multiplying by the loop area. The induced voltage is the time rate of change of this flux. As an example, consider a distance from the ESD pulse of 0.1 m. The H field is 5/0.1 × 2π A/m. The B field is 4π × 10−7 H or 10−5 T. If the loop area is 0.0001 m2, the flux is 10−9 lines. If this flux changes in 1 ns then the voltage in the loop is 1.0 V.

Zappers are pulse generators that are used in testing hardware. The pulse amplitude can be varied from about 1 to 15 kV. There are usually two modes of operation, a direct contact and a near contact. In the direct contact mode, a pulse of current is injected into a structure without an arc. In the arcing mode an external field is generated that can enter through apertures. The most critical arcing, voltage is about 7 kV. Above that voltage, most of the energy is lost in heat and light. Testing should proceed starting at a low voltage and progress through all key points in both modes. When trouble is encountered, the testing is stopped and needed changes to the structure are made.

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