9.5. ARCHITECTURE-SPECIFIC OPTIMIZATIONS 137
armv7-a-DMETHOD=1"
}
}
}
Code sections can then be enabled or disabled depending on the flags set when the library is
getting compiled. is allows architecture-specific optimizations to be included in one main set
of source files. As noted below, the METHOD flag is defined to enable NEON code blocks:
#if METHOD == 1
/* Normal code */
#elif METHOD = 2
/* NEON code */
#endif
Note that this is only one case and the Gradle build system allows compilation of completely
separate source sets for different architectures. is eliminates the need for using compiler flags
for source code selection when building for different architectures. In addition, separate compi-
lation flags may be set for each product flavor, allowing one to fine-tune to a specific architecture.
It is to be emphasized that this discussion of the Gradle build system may change due to the rel-
atively recent release of Android Studio as well as the continued development effort by Google
on the Android Studio IDE.
9.5.2 ARM HARDWARE CAPABILITIES
Often, significant gains in performance can be acquired by enabling compilation for the hard-
ware architecture version that is being used. For example, the compilation setting armeabi refers
to processors up to ARMv6. When using ARMv7, the compilation setting armeabi-v7a pro-
vides additional instruction sets such as umb-2 and VFPv3 (vector floating-point). One major
disadvantage of ARMv6 is the absence of a hardware floating-point unit. is results in floating-
point operations to be performed via software routines instead of a dedicated hardware. ARMv7
allows hardware floating-point operations with the addition of the VFPv3 instruction set. An-
other feature introduced with ARMv7 is the Advanced SIMD instruction set provided by the
NEON Media Processing Engine (NEON MPE) or coprocessor. ese instructions are sim-
ilar to the MMX and SSE SIMD (single instruction, multiple-data) instruction sets on Intel
processors.
e Advanced SIMD instruction set includes many functions specifically targeted for
signal processing applications. For example, in the linear convolution code, the core multiply-
accumulate statement consists of a multiply operation followed by an addition operation. is
causes a value getting rounded after both of the multiplication and the addition operations are
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