Table of Contents
1.1 What Is the ARM Cortex-M3 Processor?
1.2 Background of ARM and ARM Architecture
1.3 Instruction Set Development
1.4 The Thumb-2 Technology and Instruction Set Architecture
1.5 Cortex-M3 Processor Applications
CHAPTER 2. Overview of the Cortex-M3
2.4 The Built-In Nested Vectored Interrupt Controller
4.4 Several Useful Instructions In the Cortex-M3
5.1 Memory System Features Overview
5.4 Default Memory Access Permissions
CHAPTER 6. Cortex-M3 Implementation Overview
6.3 Bus Interfaces on the Cortex-M3
6.4 Other Interfaces on the Cortex-M3
6.7 Reset Types and Reset Signals
7.4 Interrupt Inputs and Pending Behavior
7.6 Supervisor Call and Pendable Service Call
CHAPTER 8. The Nested Vectored Interrupt Controller and Interrupt Control
8.1 Nested Vectored Interrupt Controller Overview
8.2 The Basic Interrupt Configuration
8.3 Example Procedures In Setting Up an Interrupt
9.1 Interrupt/Exception Sequences
9.6 More on the Exception Return Value
9.8 Faults Related to Interrupts
CHAPTER 10. Cortex-M3 Programming
10.2 A Typical Development Flow
10.6 Using Exclusive Access for Semaphores
10.7 Using Bit Band for Semaphores
10.8 Working with Bit Field Extract and Table Branch
CHAPTER 11. Exception Programming
11.2 Exception/Interrupt Handlers
11.4 Example of Vector Table Relocation
11.6 SVC Example: Use for Text Message Output Functions
CHAPTER 12. Advanced Programming Features and System Behavior
12.1 Running a System with Two Separate Stacks
12.2 Double-Word Stack Alignment
12.4 Performance Considerations
CHAPTER 13. The Memory Protection Unit
CHAPTER 14. Other Cortex-M3 Features
14.3 Multiprocessor Communication
CHAPTER 15. Debug Architecture
15.1 Debugging Features Overview
15.5 Breakpoint in the Cortex-M3
15.6 Accessing Register Content in Debug
15.7 Other Core Debugging Features
CHAPTER 16. Debugging Components
16.6 The Flash Patch and Breakpoint Unit
16.7 The Advanced High-Performance Bus Access Port
CHAPTER 17. Getting Started with the Cortex-M3 Processor
17.1 Choosing a Cortex-M3 Product
17.3 Differences between the Cortex-M3 Revision 0 and Revision 1
17.4 Differences between the Cortex-M3 Revision 1 and Revision 2
17.5 Benefits and Effects of the Revision 2 New Features
17.6 Differences between the Cortex-M3 and Cortex-M0
CHAPTER 18. Porting Applications from the ARM7 to the Cortex-M3
CHAPTER 19. Starting Cortex-M3 Development Using the GNU Tool Chain
19.2 Getting the GNU Tool Chain
19.5 Accessing Special Registers
19.6 Using Unsupported Instructions
19.7 Inline Assembler in the GNU C Compiler
CHAPTER 20. Getting Started with the Keil RealView Microcontroller Development Kit
20.2 Getting Started with μVision
20.3 Outputting the “Hello World” Message Via Universal Asynchronous Receiver/Transmitter
20.6 The Instruction Set Simulator
20.7 Modifying the Vector Table
20.8 Stopwatch Example with Interrupts with CMSIS
20.9 Porting Existing Applications to Use CMSIS
CHAPTER 21. Programming the Cortex-M3 Microcontrollers in NI LabVIEW
21.4 Example of a LabVIEW Project
APPENDIX A. The Cortex-M3 Instruction Set, Reference Material
A.2 About the Instruction Descriptions
A.3 Memory Access Instructions
A.4 General Data-Processing Instructions
A.5 Multiply and Divide Instructions
A.8 Branch and Control Instructions
A.9 Miscellaneous Instructions
APPENDIX B. The 16-Bit Thumb Instructions and Architecture Versions
APPENDIX C. Cortex-M3 Exceptions Quick Reference
C.1 Exception Types and Enables
C.2 Stack Contents After Exception Stacking
APPENDIX D. Nested Vectored Interrupt Controller and System Control Block Registers Quick Reference
APPENDIX E. Cortex-M3 Troubleshooting Guide
E.3 Understanding the Cause of the Fault
APPENDIX F. Example Linker Script for CodeSourcery G++
F.1 Example Linker Script for Cortex-M3
APPENDIX G. CMSIS Core Access Functions Reference
G.1 Exception and Interrupt Numbers
G.3 System and SysTick Functions
G.4 Core Registers Access Functions
G.6 Debug Message Output Function
APPENDIX H. Connectors for Debug and Tracers
H.2 The 20-Pin Cortex Debug + ETM Connector
H.3 The 10-Pin Cortex Debug Connector
H.4 Legacy 20-Pin IDC Connector