Terms and Abbreviations
| Abbreviation | Meaning |
| ADK | AMBA Design Kit |
| AHB | Advanced High-Performance Bus |
| AHB-AP | AHB Access Port |
| AMBA | Advanced Microcontroller Bus Architecture |
| APB | Advanced Peripheral Bus |
| ARM ARM | ARM Architecture Reference Manual |
| ASIC | Application-specific integrated circuit |
| ATB | Advanced Trace Bus |
| BE8 | Byte-invariant big endian mode |
| CMSIS | Cortex Microcontroller Software Interface Standard |
| CPI | Cycles per instruction |
| CPU | Central processing unit |
| CS3 | CodeSourcery Common Start-up Code Sequence |
| DAP | Debug Access Port |
| DSP | Digital Signal Processor/Digital Signal Processing |
| DWT | Data Watchpoint and Trace unit |
| EABI/ABI | Embedded application binary interface |
| ETM | Embedded Trace Macrocell |
| FPB | Flash Patch and Breakpoint unit |
| FPGA | Field Programmable Gate Array |
| FSR | Fault status register |
| HTM | CoreSight AHB Trace Macrocell |
| ICE | In-circuit emulator |
| IDE | Integrated Development Environment |
| IRQ | Interrupt Request (normally refers to external interrupts) |
| ISA | Instruction set architecture |
| ISR | Interrupt Service Routine |
| ITM | Instrumentation Trace Macrocell |
| JTAG | Joint Test Action Group (a standard of test/debug interfaces) |
| JTAG-DP | JTAG Debug Port |
| LR | Link register |
| LSB | Least Significant Bit |
| LSU | Load/store unit |
| MCU | Microcontroller Unit |
| MDK-ARM | Keil Microcontroller Development Kit for ARM |
| MMU | Memory management unit |
| MPU | Memory Protection Unit |
| MSB | Most Significant Bit |
| MSP | Main Stack Pointer |
| NMI | Nonmaskable interrupt |
| NVIC | Nested Vectored Interrupt Controller |
| OS | Operating system |
| PC | Program counter |
| PMU | Power management unit |
| PSP | Process Stack Pointer |
| PPB | Private Peripheral Bus |
| PSR | Program Status Register |
| SCB | System control block |
| SCS | System control space |
| SIMD | Single Instruction, Multiple Data |
| SoC | System-on-Chip |
| SP | Stack pointer |
| SRPG | State retention power gating |
| SW | Serial-Wire |
| SW-DP | Serial-Wire Debug Port |
| SWJ-DP | Serial-Wire JTAG Debug Port |
| SWV | Serial-Wire Viewer (an operation mode of TPIU) |
| TCM | Tightly coupled memory (Cortex-M1 feature) |
| TPA | Trace Port Analyzer |
| TPIU | Trace Port Interface Unit |
| TRM | Technical Reference Manual |
| UAL | Unified Assembly Language |
| UART | Universal Asynchronous Receiver Transmitter |
| WIC | Wakeup Interrupt Controller |
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