4.2 The Power Time Constant
Circuit theory supports the view of instantaneous power. When a 50-ohm load is placed across a 5-V voltage source, we expect that the power level to be 0.5 W immediately. What actually happens in the first few nanoseconds is different. Assume a fast switch and an ideal voltage source in series with a 50-ohm transmission line. When a 50-ohm load is placed on the far end of the transmission line, the voltage sags to 2.5 V. The power level at this time is 0.125 W. The power will stay at this level until a wave moving on the line reflects at a voltage source and returns to the load. Waves must make several round trips before the power level rises to near 0.5 W. If the line is 1 cm long, one round trip time on a typical circuit board is 0.13 ns.
Consider the case when the 50-ohm transmission line is connected to a 5-V source and the load is 5 ohms. The expected power level is 5 W. On a 50-ohm line the voltage sags to 0.45 V and the delivered power is only 0.0409 W. The sag in voltage means that a negative wave of 4.55 V is sent down the line toward the voltage source. A reflected wave at the voltage source brings energy back to the load. Waves continue to make round trips between the load and the voltage source until the voltage at the load rises to near 5 V. The time constant as given by Equation 2.7 depends on the parameters of the transmission line and the value of the load. For a 5-ohm load and a 50-ohm line that is 10 cm long, the time constant is 14.3 ns. It takes about 3 time constants to reach 95% of final value or about 44 ns. For many logic circuits this delay is not acceptable. See Figures 2.12 and 2.13 for examples of how the voltage builds on cascaded transmission lines.
In circuit analysis we are familiar with the term ideal voltage source. When a load is applied to an ideal voltage source the current that flows is instantaneous. The voltage must remain constant regardless of the load value or how long the load remains connected.
If this ideal voltage source existed, any connected load involves some lead length. In fact, every component has dimensions, and this means there is always a transmission line process involved when a load is connected to a voltage source. A 10-mm-long connection is small, but this connection is still a transmission line. Again using Equation 2.7, the time constant is 4.4 ns. At 1 GHz a clock period is 1 ns, thus it is obvious that short connections limit power flow in the first few nanoseconds. This delay must be considered in the design of fast logic.
In theory, this connection problem can be solved by reducing the characteristic impedance of the leads connecting to the source. For example, if the characteristic impedance of the 10-mm line is 0.1 ohm, the voltage sag would only be 2%. This assumes that the load has no lead length, which is of course impossible.
The loop area involved in connecting a load to a voltage source certainly has inductance. In a circuit sense, this connecting lead geometry plus the component capacitance form an RLC circuit. We have shown that in a fast circuit, any time delay that is measured involves the round trip propagation time and multiple reflections through the entire circuit. This means that in fast circuits, smooth exponential transitions do not occur. For example, during the time when the first wave is making a round trip, the voltage is constant.