Here's a breakdown of the registers in IA64, along with notes about the registers we saw in IA32:

• RAX: This is still the accumulator register but is now 64 bits wide and contains EAX (32 bits), AX (16 bits), AH (8 bits high), and AL (8 bits low).
• RBX: This is 64 bits wide and contains EBX (32 bits), BX (16 bits), BH (8 bits high), and BL (8 bits low).
• RCX: This is still the counter register but is now 64 bits wide and contains ECX (32 bits), CX (16 bits), CH (8 bits high), and CL (8 bits low).
• RDX: This is 64 bits wide and contains EDX (32 bits), DX (16 bits), DH (8 bits high), and DL (8 bits low).
• RSI: This is 64 bits wide, still serves as the source pointer for string operations, and contains ESI (32 bits), SI (16 bits), and SIL (8 bits).
• RDI: This is 64 bits wide, still serves as the destination pointer for string operations, and contains EDI (32 bits), DI (16 bits), and a new register called DIL (8 bits). 
• RBP: This still acts as the base pointer for the base of the stack, is 64 bits wide, and contains EBP (32 bits), BP (16 bits), and BPL (8 bits).
• RSP: This still acts as the stack pointer for the top of the stack, is 64 bits wide, and contains ESP (32 bits), SP (16 bits), and SPL (8 bits).
• R8: This is a new register that is 64 bits wide and contains R8D (32 bits), R8W (16 bits), and R8L (8 bits).
• R9: This is a new register that is 64-bits wide and contains R9D (32 bits), R9W (16 bits), and R9L (8 bits).
• R10: This is a new register that is 64-bits wide and contains R10D (32 bits), R10W (16 bits), and R10L (8 bits).
• R11: This is a new register that is 64-bits wide and contains R11D (32 bits), R11W (16 bits), and R11L (8 bits).
• R12: This is a new register that is 64-bits wide and contains R12D (32 bits), R12W (16 bits), and R12L (8 bits).
• R13: This is a new register that is 64-bits wide and contains R13D (32 bits), R13W (16 bits), and R13L (8 bits).
• R14: This is a new register that is 64-bits wide and contains R14D (32 bits), R14W (16 bits), and R14L (8 bits).
• R15: This is a new register that is 64-bits wide and contains R15D (32 bits), R15W (16 bits), and R15L (8 bits).
• RIP: This is still the instruction pointer register, is 64 bits wide, and supports a new mode of operation called RIP-relative addressing. Essentially, this allows you to access areas of memory as it relates to the address of the next instruction stored in this register.
• RFLAGS: This is now 64 bits wide, the upper 32 bits of this register are reserved, and the lower 32 bits are the same as the EFLAGS register in IA32.

To learn more about IA64 as it pertains to the segment registers and the flat memory model, refer to the Intel Software Developer's Manual Volume 1, Chapter 3, Section 3.4.2. Specific details pertaining to the 64-bit operation mode are found in Section 3.4.2.1 on page 3-15: https://software.intel.com/sites/default/files/managed/39/c5/325462-sdm-vol-1-2abcd-3abcd.pdf.

We're not even close to covering all we need to cover. The next few recipes will help us to understand some of the instructions we learned in previous IA32 recipes and how they apply to IA64. We'll also cover system calls and how they are different in IA64.