Title Page
by George Bourianoff, Victor Zhirnov, James Hutch, An Chen
Emerging Nanoelectronic Devices
- Cover
- Title Page
- Copyright
- Dedication
- Preface
- List of Contributors
- Acronyms
- Part One: Introduction
- Chapter 1: The Nanoelectronics Roadmap
- 1.1 Introduction
- 1.2 Technology Scaling: Impact and Issues
- 1.3 Technology Scaling: Scaling Limits of Charge-based Devices
- 1.4 The International Technology Roadmap for Semiconductors
- 1.5 ITRS Emerging Research Devices International Technology Working Group
- 1.6 Guiding Performance Criteria
- 1.7 Selection of Nanodevices as Technology Entries
- 1.8 Perspectives
- References
- Chapter 2: What Constitutes a Nanoswitch? A Perspective
- 2.1 The Search for a Better Switch
- 2.2 Complementary Metal Oxide Semiconductor Switch: Why it Shows Gain
- 2.3 Switch Based on Magnetic Tunnel Junctions: Would it Show Gain?
- 2.4 Giant Spin Hall Effect: A Route to Gain
- 2.5 Other Possibilities for Switches with Gain
- 2.6 What do Alternative Switches Have to Offer?
- 2.7 Perspective
- 2.8 Summary
- Acknowledgments
- References
- Chapter 1: The Nanoelectronics Roadmap
- Part Two: Nanoelectronic Memories
- Chapter 3: Memory Technologies: Status and Perspectives
- Chapter 4: Spin Transfer Torque Random Access Memory
- 4.1 Chapter Overview
- 4.2 Spin Transfer Torque
- 4.3 STT-RAM Operation
- 4.4 STT-RAM with Perpendicular Anisotropy
- 4.5 Stack and Material Engineering for Jc Reduction
- 4.6 Ultra-Fast Switching of MTJs
- 4.7 Spin–Orbit Torques for Memory Application
- 4.8 Current Demonstrations for STT-RAM
- 4.9 Summary and Perspectives
- References
- Chapter 5: Phase Change Memory
- Chapter 6: Ferroelectric FET Memory
- Chapter 7: Nano-Electro-Mechanical (NEM) Memory Devices
- Chapter 8: Redox-based Resistive Memory
- Chapter 9: Electronic Effect Resistive Switching Memories
- Chapter 10: Macromolecular Memory
- Chapter 11: Molecular Transistors
- Chapter 12: Memory Select Devices
- Chapter 13: Emerging Memory Devices: Assessment and Benchmarking
- 13.1 Introduction
- 13.2 Common Emerging Memory Terminology and Metrics
- 13.3 Redox RAM
- 13.4 Emerging Ferroelectric Memories
- 13.5 Mott Memory
- 13.6 Macromolecular Memory
- 13.7 Carbon-based Resistive Switching Memory
- 13.8 Molecular Memory
- 13.9 Assessment and Benchmarking
- 13.10 Summary and Conclusions
- Acknowledgments
- References
- Part Three: Nanoelectronic Logic and Information Processing
- Part Four: Concepts for Emerging Architectures
- Chapter 21: Nanomagnet Logic: A Magnetic Implementation of Quantum-dot Cellular Automata
- Chapter 22: Explorations in Morphic Architectures
- Chapter 23: Design Considerations for a Computational Architecture of Human Cognition
- Chapter 24: Alternative Architectures for NonBoolean Information Processing Systems
- Chapter 25: Storage Class Memory
- Part Five: Summary, Conclusions, and Outlook for Nanoelectronic Devices
- Index
- End User License Agreement
Emerging Nanoelectronic Devices
An Chen
GLOBALFOUNDRIES, USA
James Hutchby
Semiconductor Research Corporation, USA
Victor Zhirnov
Semiconductor Research Corporation, USA
George Bourianoff
Intel Corporation, USA
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