Figure 1.2 How defects from early phases add to the costs. (The black and white figure is available on Chapter.)

Figure 2.3 Spiral model. (The black and white figure is available on Chapter.)

Figure 2.6 Modified V model. (The black and white figure is available on Chapter.)

Figure 3.1 Classification of white box testing. (The black and white figure is available on Chapter.)

Figure 3.2 Flowchart for a date validation routine. (The black and white figure is available on Chapter.)

Figure 3.4 Converting a conventional flowchart to a flow graph. (The black and white figure is available on Chapter.)

Figure 4.1 Graphical representation of test case results. (The black and white figure is available on Chapter.)

Figure 5.1 A set of modules and interfaces. (The black and white figure is available on Chapter.)

Figure 5.2 Example of top down integrations. (The black and white figure is available on Chapter.)

Figure 5.3 Example of bottom up integration. Arrows pointing down depict logic flow; arrows pointing up indicate integration paths. (The black and white figure is available on Chapter.)

Figure 5.4 Bi-directional integration. (The black and white figure is available on Chapter.)

Figure 5.5 Example of use case scenario in a bank. (The black and white figure is available on Chapter.)

Figure 6.1 Different perspectives of system testing. (The black and white figure is available on Chapter.)

Figure 6.2 Stages of deployment testing. (The black and white figure is available on Chapter.)

Figure 6.9 Relationship of entry criteria to time lines. (The black and white figure is available on Chapter.)

Figure 6.10 Entry criteria to balance parallelism with quality. (The black and white figure is available on Chapter.)

Figure 6.11 Exploiting parallelism across test phases to work on multiple releases simultaneously. (The black and white figure is available on Chapter.)

Figure 7.3 (a) Response time; (b) throughput; (c) throughput and resource utilization. (The black and white figure is available on Chapter.)

Figure 7.4 (a) Throughput; (b) response time. (The black and white figure is available on Chapter.)

Figure 8.1 Regression testing—types. (The black and white figure is available on Chapter.)

Figure 8.3 CM defects. (The black and white figure is available on Chapter.)

Figure 8.4 Classification of test cases—An example. (The black and white figure is available on Chapter.)

Figure 8.5 Methodology for selection of test cases. (The black and white figure is available on Chapter.)

Figure 9.1 Major activities in internationalization testing. (The black and white figure is available on Chapter.)

Figure 9.2 Phases of SDLC V model related to internationalization activities. (The black and white figure is available on Chapter.)

Figure 9.3 Reading and scrolling direction. (The black and white figure is available on Chapter.)

Figure 9.4 IME soft keyboard for Japanese. (The black and white figure is available on Chapter.)

Figure 9.5 Fake language testing. (The black and white figure is available on Chapter.)

Figure 9.6 Language testing and locale combinations that have to be tested in a client-server architecture. (The black and white figure is available on Chapter.)

Figure 9.7 Difference in read directions. (The black and white figure is available on Chapter.)

Figure 9.8 Sort order in English and Spanish. (The black and white figure is available on Chapter.)

Figure 10.1 Ad hoc testing versus planned testing. (The black and white figure is available on Chapter.)

Figure 15.1 Gantt chart. (The black and white figure is available on Chapter.)

Figure 16.1 Framework for test automation. (The black and white figure is available on Chapter.)

Figure 16.2 Components of test automation. (The black and white figure is available on Chapter.)

Figure 16.3 Role of test console and multiple execution module. (The black and white figure is available on Chapter.)

Figure 16.4 Similiarities between product development and automation. (The black and white figure is available on Chapter.)

Figure 16.5 W model: Phases involved in automation. (The black and white figure is available on Chapter.)

Figure 17.1 Setps in a metrics program. (The black and white figure is available on Chapter.)

Figure 17.2 Types of metrics. (The black and white figure is available on Chapter.)

Figure 17.3 Phase-wire effort variation. (The black and white figure is available on Chapter.)

Figure 17.4 Schedule variance. (The black and white figure is available on Chapter.)

Figure 17.5 Actual effort distribution. (The black and white figure is available on Chapter.)

Figure 17.6 Progress of test case execution. (The black and white figure is available on Chapter.)

Figure 17.7 Typical pattern for finding defects in a product. (The black and white figure is available on Chapter.)

Figure 17.8 Defect trend. (The black and white figure is available on Chapter.)

Table 5.1 Order of testing interfaces for the example in Figure 5.2. (The black and white format is available on Chapter.)

Table 5.2 Order of interfaces tested using bottom up integration for Figure 5.3. (The black and white format is available on Chapter.)

Table 5.3 Steps for integration using sandwich testing. (The black and white format is available on Chapter.)