Suspending Moore's Second Law—The Battle Plan

When designing the Explicitly Parallel Instruction Computing, (EPIC) architecture, we realized early on that we could overcome Moore's second law by attacking the problem on two sides—one economic and one technical. The first, economic-approach was to create an industry standard that could bring the economies of scale that would be needed to keep the price portion of the equation in check. The second approach was to use technological advancement to uphold the levels of performance dictated by Moore's First law without doing so by doing more than changing the manufacturing process. (I.e., clever design)

The Primary Thrust: An Industry Standard

One of the reasons that HP joined forces with its supplier Intel was this law of economics. Hewlett-Packard realized that in order to create these chips cost effectively and to sell them at a reasonable price, they had to be mass-produced. But even so, the cost of the undertaking was staggering, even for a company of HP's size. However, Intel had the know-how and the manufacturing muscle to get a new architecture to the market in economically feasible numbers.

This is a key point in the way that the new design was brought to the market. On one hand, the emphasis on error correction and explicit parallelism would win acclaim in the reliability and performance arenas. However, it also needed to become an 'industry standard to achieve an optimal price-performance signature.

We were focused on this price-performance model because our end destination was not only to bring a next generation chip family to the market, but also do so in a way that would allow it to be pervasive within the market. Instead of being the 'Rolls Royce' of processors—powerful but expensive enough to only appeal to a few players—we were looking at capturing a larger audience. To go beyond the customer set of the early adopters and raise the bar not only in speed, but also in its ability to stake out and be highly successful in its market segment.

The Flanking Maneuver: Emphasize Architecture

The second approach was to get a long-term performance gain so a manufacturer wouldn't continually have to invest in only one mechanism – increasing frequency to achieve performance gains. Considering how often this was being done, we needed something that could take us (to appropriate a managing cliché) “outside of the box”. Instead of relying solely on shrinking the line size or frequency alone on the chip, HP and Intel co-developed EPIC as an architectural breakthrough. This approach does not directly repeal Moore's second law, but it creates another path to performance improvements by invoking the use of software (e.g., compiler technology) to provide continual gains on top of the manufacturing breakthroughs that can apply to any architecture.

Fundamentally, the use of EPIC is a more extensible form of performance gain. Gains continue to accumulate for Itanium and its developing processor family as more and more things are done within the new architecture. In other words, moving us to a place where more things are done in parallel.