The Need for Aries
When we set the project milestones for the Tahoe project with Intel in 1994, one of our shared goals became readily apparent: to protect the software investments of customers and partners on the HP PA-RISC architecture as well as the Intel IA-32 systems. This was to help existing users move their legacy environments and applications—the native applications that they were currently running—into the new Itanium world with a minimum of disruption. A major component in the plan for minimizing this disruption was the Aries project, whose process is illustrated in Figure 12-1.
Figure 12-1. The Aries process cycle
The goal to provide binary compatibility affected the design of the instruction set for the Intel Itanium architecture. The instruction set of Itanium, although clearly designed for the explicitly parallel operation that is the hallmark of the Itanium architecture, was also influenced by the desire to enable a relatively clean mapping between the PA-RISC instruction set and the Itanium instruction set. This mapping led the way for the clean execution of PA-RISC binary code on Itanium.