Data Speculation

EPIC also speeds up processing by a technique know as data speculation. Speculation works to reduce the memory latency, which is the delay time to access and move data to and from memory. Typically, memory speed is slower than the processor speed, which causes the processor to wait or “stall” for several clock cycles each time it must access memory. As a general rule, today's systems have memory that runs at about half the speed of the processor.

With speculation, the program is able to put all the “load instructions” at the start of a routine. As the loads are processed, other set up or processing can be performed so that when the program is ready to use the load results, the data is ready to use. As an example, see Figure 8-3.

This type of operation can be performed in today's RISC and CISC machines; however, the problem is that the program is “speculating” that the data will still be valid when it is used. If it is not, then some error recovery routine is required to reload the data before the program can proceed. Not only does this require more code, but if the programmer fails to include the error recovery, the results could be disastrous.

Load instructions in an Itanium-based computer can be executed with a “check.” Much like the predication example, this check option allows a bit to be set if the data that was loaded is good; that is, it has not been modified since the load occurred. If the check is okay, the data is used, and the process continues. If not, the data is reloaded transparently to the program.

One hardware feature that improves efficiency in this area is the advanced load address table (ALAT) that allows loads to be potentially executed before stores. First, a load is executed, and then the special check instruction is executed. The check instruction examines the ALAT to determine if a dependency exists and if the speculative load is indeed correct. Figure 8-4 provides an example of this in action.

Speculation becomes a key component as processor speeds continue to outpace the speed of system memory. Continued work in speculation enables Itanium to reduce or eliminate much of the latency involved during access to system memory because of the disparity between the speeds of the processor and the memory itself.