Itanium Processor Register Set Model

The EPIC architecture upon which the Itanium processor is based allows for a large number of registers. The 128 floating-point registers combine both fixed and rotating registers. The rotating registers are normally used for software pipelining loops to greatly speed up loop execution. This allows the encoding of common algorithms without running the risk of depleting the available register space. It also allows you to move data between registers without having to resort to complex tricks that slow the processor down.

The Itanium microprocessor's large register set provides a place to store intermediate results during complex calculations. Latency is reduced, as going back to on-chip cache or the off-chip RAM for a memory read or write would result in a delay due to the extra steps (latency) involved. The Itanium processor registers also act as a buffer to store data between the functional units and the memory, thereby lessening the likelihood of 'stalls' in the software pipeline. These stalls result from the lack of data and also are responsible for slowing down the overall speed of applications. By avoiding this scenario, a higher rate of sustained parallel performance is more easily achieved.