12.3.1 ZC Resonant Switch

In a ZC resonant switch, an inductor L_r is connected in series with a power switch S in order to achieve zero-current switching (ZCS). If the switch S is a unidirectional switch, the switch current is allowed to resonate in the positive half cycle only. The resonant switch is said to operate in half-wave mode. If a diode is connected in antiparallel with the unidirectional switch, the switch current can flow in both directions. In this case, the resonant switch can operate in full-wave mode. At turn-on, the switch current will rise slowly from zero. It will then oscillate, because of the resonance between L_r and C_r. Finally, the switch can be commutated at the next zero-current duration. The objective of this type of switch is to shape the switch current waveform during conduction time in order to create a zero-current condition for the switch to turn off [13].

12.3.2 ZV Resonant Switch

In a ZV resonant switch, a capacitor C_r is connected in parallel with the switch S for achieving zero-voltage switching (ZVS). If the switch S is a unidirectional switch, the voltage across the capacitor C_r can oscillate freely in both positive and negative half cycle. Thus, the resonant switch can operate in full-wave mode. If a diode is connected in antiparallel with the unidirectional switch, the resonant capacitor voltage is clamped by the diode to zero during the negative half cycle. The resonant switch will then operate in half-wave mode. The objective of a ZV switch is to use the resonant circuit to shape the switch voltage waveform during the off time in order to create a zero-voltage condition for the switch to turn on [13].

12.4.1 ZCS-QRCs

A ZCS-QRC designed for half-wave operation is illustrated with a buck-type DC-DC converter. The schematic is shown in Fig. 12.5A. It is formed by replacing the power switch in conventional PWM buck converter with the ZC resonant switch in Fig. 12.3A. The circuit waveforms in steady state are shown in Fig. 12.5B. The output filter inductor L_f is sufficiently large so that its current is approximately constant. Prior to turning the switch on, the output current I_o freewheels through the output diode D_f. The resonant capacitor voltage V_Cr equals zero. At t₀, the switch is turned on with ZCS. A quasi-sinusoidal current I_S flows through L_r and C_r, the output filter, and the load. S is then softly commutated at t₁ with ZCS again. During and after the gate pulse, the resonant capacitor voltage V_Cr rises and then decays at a rate depending on the output current. Output voltage regulation is achieved by controlling the switching frequency. Operation and characteristics of the converter depend mainly on the design of the resonant circuit L_r C_r. The following parameters are defined: voltage conversion ratio M, characteristic impedance Z_r, resonant frequency f_r, normalized load resistance r, and normalized switching frequency γ:

$M=\frac{V_o}{V_i}$

$Z_r=\sqrt{\frac{L_r}{C_r}}$

$f_r=\frac{1}{2\pi \sqrt{L_r{C}_r}}$

$r=\frac{R_L}{z_r}$

$\gamma =\frac{f_s}{f_r}$

It can be seen from the waveforms that if I_o>V_i/Z_r, I_S will not come back to zero naturally and the switch will have to be forced off, thus resulting in turn-off losses.

The relationships between M and γ at different r are shown in Fig. 12.5C. It can be seen that M is sensitive to the load variation. At light-load conditions, the unused energy is stored in C_r, leading to an increase in the output voltage. Thus, the switching frequency has to be controlled, in order to regulate the output voltage.

If an antiparallel diode is connected across the switch, the converter will be operating in full-wave mode. The circuit schematic is shown in Fig. 12.6A. The circuit waveforms in steady state are shown in Fig. 12.6B. The operation is similar to the one in half-wave mode. However, the inductor current is allowed to reverse through the antiparallel diode, and the duration for the resonant stage is lengthened. This permits excess energy in the resonant circuit at light loads to be transferred back to the voltage source V_i. This significantly reduces the dependence of V_o on the output load. The relationships between M and γ at different r are shown in Fig. 12.6C. It can be seen that M is insensitive to load variation.

By replacing the switch in the conventional converters, a family of QRC [9] with ZCS is shown in Fig. 12.7.

12.4.2 ZVS-QRC

In these converters, the resonant capacitor provides a zero-voltage condition for the switch to turn on and off. A quasi-resonant buck converter designed for half-wave operation is shown in Fig. 12.8A—using a ZV resonant switch in Fig. 12.4B. The steady-state circuit waveforms are shown in Fig. 12.8B. Basic relations of ZVS-QRCs are given in Eqs. (12.1A)–(12.1E). When the switch S is turned on, it carries the output current I_o. The supply voltage V_i reverse biases the diode D_f. When the switch is zero-voltage (ZV) turned off, the output current starts to flow through the resonant capacitor C_r. When the resonant capacitor voltage V_Cr is equal to V_i, D_f turns on. This starts the resonant stage. When V_Cr equals zero, the antiparallel diode turns on. The resonant capacitor is shorted, and the source voltage is applied to the resonant inductor L_r. The resonant inductor current I_Lr increases linearly until it reaches I_o. Then, D_f turns off. In order to achieve ZVS, S should be triggered during the time when the antiparallel diode conducts. It can be seen from the waveforms that the peak amplitude of the resonant capacitor voltage should be greater or equal to the input voltage (i.e., I_oZ_r>V_in). From Fig. 12.8C, it can be seen that the voltage conversion ratio is load-sensitive. In order to regulate the output voltage for different loads r, the switching frequency should also be changed accordingly.

ZVS converters can be operated in full-wave mode. The circuit schematic is shown in Fig. 12.9A. The circuit waveforms in steady state are shown in Fig. 12.9B. The operation is similar to half-wave mode of operation, except that V_Cr can swing between positive and negative voltages. The relationships between M and γ at different r are shown in Fig. 12.9C.

Comparing Fig. 12.8C with Fig. 12.9C, it can be seen that M is load-insensitive in full-wave mode. This is a desirable feature. However, as the series diode limits the direction of the switch current, energy will be stored in the output capacitance of the switch and will dissipate in the switch during turn-on. Hence, the full-wave mode has the problem of capacitive turn-on loss and is less practical in high-frequency operation. In practice, ZVS-QRCs are usually operated in half-wave mode rather than full-wave mode.

By replacing the ZV resonant switch in the conventional converters, various ZVS-QRCs can be derived. They are shown in Fig. 12.10.

12.4.3 Comparisons Between ZCS and ZVS

ZCS can eliminate the switching losses at turnoff and reduce the switching losses at turn-on. As a relatively large capacitor is connected across the output diode during resonance, the converter operation becomes insensitive to the diode's junction capacitance. When power MOSFETs are zero-current switched on, the energy stored in the device's capacitance will be dissipated. This capacitive turn-on loss is proportional to the switching frequency. During turn-on, considerable rate of change of voltage can be coupled to the gate drive circuit through the Miller capacitor, thus increasing switching loss and noise. Another limitation is that the switches are under high current stress, resulting in higher conduction loss. However, it should be noted that ZCS is particularly effective in reducing switching loss for power devices (such as IGBT) with large tail current in the turn-off process.

ZVS eliminates the capacitive turn-on loss. It is suitable for high-frequency operation. For single-ended configuration, the switches could suffer from excessive voltage stress, which is proportional to the load. It will be shown in Section 12.5 that the maximum voltage across switches in half-bridge and full-bridge configurations is clamped to the input voltage.

For both ZCS and ZVS, the output regulation of the resonant converters can be achieved by variable frequency control. ZCS operates with constant on-time control, while ZVS operates with constant off-time control. With a wide input and load range, both techniques have to operate with a wide switching frequency range, making it not easy to design resonant converters optimally.

12.5.1 ZVS With Clamped Voltage

The high voltage stress problem in the single-switch configuration with ZVS can be avoided in half-bridge (HB) and full-bridge (FB) configurations [14–17]. The peak switch voltage can be clamped to the DC supply rail, thus reducing the switch voltage stress. In addition, the series transformer leakage and circuit inductance can form parts of the resonant path. Therefore, these parasitic components, which are undesirable in hard-switched converter, become useful components in ZVS ones. Figs. 12.11 and 12.12 show the ZVS HB and FB circuits, respectively, together with the circuit waveforms. The resonant capacitor is equivalent to the parallel connection of the two capacitors (C_r/2) across the switches. The off-state voltage of the switches will not exceed the input voltage during resonance because they will be clamped to the supply rail by the antiparallel diode of the switches.

12.5.2 Phase-shifted Converter With Zero Voltage Transition

In a conventional FB converter, the two diagonal switch pairs are driven alternatively. The output transformer is fed with an AC rectangular voltage. By applying a phase-shifting approach, a deliberate delay can be introduced between the gate signals and the switches [18]. The circuit waveforms are shown in Fig. 12.13. Two upper or lower switches can be conducting (either through the switch or the antiparallel diode), yet the applied voltage to the transformer is zero. This zero-voltage condition appears in the interval [t₁, t₂] of V_pri in Fig. 12.13. This operating stage corresponds to the required off time for that particular switching cycle. When the desired switch is turned off, the primary transformer current flows into the switch output capacitance causing the switch voltage to resonate to the opposite input rail. Effects of the parasitic circuit components are used advantageously to facilitate the resonant transitions. This enables a ZVS condition for turning on the opposite switch. Thus, varying the phase shift controls the effective duty cycle and hence the output power. The resonant circuit is necessary to meet the requirement of providing sufficient inductive energy to drive the capacitors to the opposite bus rail. The resonant transition must be achieved within the designed transition time.

12.9.1 Series Resonant Converters

Series resonant converters (SRCs) have their load connected in series with the resonant tank circuit, which is formed by L_r and C_r [15,27–29]. The half-bridge configuration is shown in Fig. 12.23. When the resonant inductor current i_Lr is positive, it flows through T₁ if T₁ is on; otherwise, it flows through the diode D₂. When i_Lr is negative, it flows through T₂ if T₂ is on; otherwise, it flows through the diode D₁. In the steady-state symmetrical operation, both the active switches are operated in a complementary manner. Depending on the ratio between the switching frequency ω_S and the converter resonant frequency ω_r, the converter has several possible operating modes.

12.9.1.1 Discontinuous Conduction Mode With ω_S<0.5ω_r

Fig. 12.24A shows the waveforms of i_Lr and the resonant capacitor voltage v_Cr in this mode of operation. From 0 to t₁, T₁ conducts. From t₁ to t₂, the current in T₁ reverses its direction. The current flows through D₁ and back to the supply source. From t₂ to t₃, all switches are in the off state. From t₃ to t₄, T₂ conducts. From t₄ to t₅, the current in T₂ reverses its direction. The current flows through D₂ and back to the supply source. T₁ and T₂ are switched on under ZCS condition, and they are switched off under zero-current and zero-voltage conditions. However, the switches are under high current stress in this mode of operation and thus have higher conduction loss.

12.9.1.3 Continuous Conduction Mode With ω_r<ω_S

Fig. 12.24C shows the circuit waveforms. From 0 to t₁, i_Lr transfers from D₁ to T₁. Thus, T₁ is switched on with zero current and zero voltage. At t₁, T₁ is switched off with finite voltage and current, resulting in turn-off switching loss. From t₁ to t₂, D₂ conducts. From t₂ to t₃, T₂ is switched on with zero current and zero voltage. At t₃, T₂ is switched off. i_Lr transfers from T₂ to D₁. As the switches are turned on with ZVS, lossless snubber capacitors can be added across the switches.

The following parameters are defined: voltage conversion ratio M, characteristic impedance Z_r, resonant frequency f_r, normalized load resistance r, normalized switching frequency γ.

$M=n{V}_o/V_{\mathit{in}}$

  (12.2A)

$Z_r=\sqrt{L_r/C_r}$

  (12.2B)

$f_r=1/\left(2\pi \sqrt{L_r{C}_r}\right)$

  (12.2C)

$r=n^2{R}_L/Z_r$

  (12.2D)

$\gamma =f_s/f_r$

  (12.2E)

$M=1/\sqrt{{\left(\gamma -1/\gamma \right)}^2/\left(r^2+1\right)}$

  (12.2F)

The relationships between M and γ for different value of r are shown in Fig. 12.25. The boundary between continuous conduction mode (CCM) and discontinuous conduction mode (DCM) is at r=1.27γ. When the converter is operating in DCM and 0.2<γ<0.5, M=1.27rγ.

The SRC has the following advantages. Transformer saturation can be avoided since the series capacitor can block the DC component. The light-load efficiency is high because the device current and conduction loss are low. However, the major disadvantages are that there is difficulty in regulating the output voltage under light-load and no-load conditions. Moreover, the output DC filter capacitor has to carry high ripple current, which could be a major problem in low-output-voltage and high-output-current applications [29].

12.9.2 Parallel Resonant Converters

Parallel resonant converters (PRCs) have their load connected in parallel with the resonant tank capacitor C_r [27–30]. The half-bridge configuration is shown in Fig. 12.26. SRC behaves as a current source, whereas the PRC acts as a voltage source. For voltage regulation, PRC requires a smaller operating frequency range than the SRC to compensate for load variation.

12.9.2.1 Discontinuous Conduction Mode

The steady-state waveforms of the resonant inductor current i_Lr and the resonant capacitor voltage v_Cr are shown in Fig. 12.27A. Initially, both i_Lr and v_Cr are zero. From 0 to t₂, T₁ conducts and is turned on with zero current. When i_Lr is less than the output current I_o, i_Lr increases linearly from 0 to t₁ and the output current circulates through the diode bridge. From t₁ to t₃, L_r resonates with C_r. Starting from t₂, i_Lr reverses its direction and flows through D₁. T₁ is then turned off with zero current and zero voltage. From t₃ to t₄, v_Cr decreases linearly due to the relatively constant value of I_o. At t₄, when v_Cr equals zero, the output current circulates through the diode bridge again. Both i_Lr and v_Cr will stay at zero for an interval. From t₅ to t₉, the above operations will be repeated for T₂ and D₂. The output voltage is controlled by adjusting the time interval of [t₄, t₅].

12.9.2.3 Continuous Conduction Mode ω_S>ω_r

If the switching frequency is higher than ω_r (Fig. 12.27C), the antiparallel diode of the switch will be turned on before the switch is triggered. Thus, the switches are turned on with ZVS. However, the switches are hard turned off with finite current and voltage.

The parameters defined in Eq. (12.2) are applicable. The relationships between M and γ for various values of r are shown in Fig. 12.28. During the DCM (i.e., γ<0.5), M is in linear relationship with γ. Output voltage regulation can be achieved easily. The output voltage is independent on the output current. The converter shows good voltage-source characteristics. It is also possible to step up and step down the input voltage.

The PRC has the advantages that the load can be short-circuited and the circuit is suitable for low-output-voltage, high-output-current applications. However, the major disadvantage of the PRC is the high device current. Moreover, since the device current does not decrease with the load, the efficiency drops with a decrease in the load [29].

12.9.3 Series-Parallel Resonant Converter

Series-parallel resonant converter (SPRC) combines the advantages of the SRC and PRC. The SPRC has an additional capacitor or inductor connected in the resonant tank circuit [29–31]. Fig. 12.29A shows an LCC-type SPRC, in which an additional capacitor is placed in series with the resonant inductor. Fig. 12.29B shows an LLC-type SPRC, in which an additional inductor is connected in parallel with the resonant capacitor in the SRC. However, there are many possible combinations of the resonant tank circuit. Detailed analysis can be found in [31].

12.10.1 QRCs and MRCs

Output regulations in many resonant-type converters, such as QRCs and MRCs, are achieved by controlling the switching frequency. ZCS applications require controlled switch-on times, while ZVS applications require controlled switch-off times. The fundamental control blocks in the IC include an error amplifier, voltage-controlled oscillator (VCO), one-shot generator with a zero wave-crossing detection comparator, and an output stage to drive the active switch. Typical ICs include UC1861-UC1864 for ZVS applications and UC 1865-UC 1868 for ZCS applications [32]. Fig. 12.30 shows the controller block diagram of UC 1864.

The maximum and minimum switching frequencies (i.e., f_max and f_min) are controlled by the resistors R_ange and R_min and the capacitor C_vco. f_max and f_min can be expressed as

$\begin{array}{ccc}\hfill f_{\text{max}}=\frac{3.6}{\left(R_{\mathit{ange}}//R_{\text{min}}\right)C_{VCO}}\hfill & \hfill \mathrm{and}\hfill & \hfill f_{\text{min}}=\frac{3.6}{R_{\text{min}}{C}_{VCO}}\hfill \end{array}$

The frequency range Δf is then equal to

$\mathrm{\Delta }f=f_{\text{max}}-f_{\text{min}}=\frac{3.6}{R_{\mathit{ange}}{C}_{VCO}}$

The frequency range of the ICs is from 10 kHz to 1 MHz. The output frequency of the oscillator is controlled by the error amplifier (E/A) output. An example of a ZVS-MR forward converter is shown in Fig. 12.31.

12.10.2 Phase-shifted, ZVT FB Circuit

The UCC3895 is a phase-shift PWM controller that can generate a phase-shifting pattern of one half-bridge with respect to the other. The application diagram is shown in Fig. 12.32.

The four outputs “OUTA,” “OUTB,” “OUTC,” and “OUTD” are used to drive the MOSFETs in the full-bridge. The dead time between “OUTA” and “OUTB” is controlled by “DELAB,” and the dead time between “OUTC” and “OUTD” is controlled by “DELCD.” Separate delays are provided for the two half-bridges to accommodate differences in resonant capacitor charging currents. The delay in each set is approximated by

$t_{\mathit{DELAY}}=\frac{25\times {10}^{-12}{R}_{DEL}}{0.75\left(V_{CS}-V_{\mathit{ADS}}\right)+0.5}+25\mathit{ns}$

where R_DEL is the resistor value connected between “DELAB” and “DELCD” to ground.

The oscillator period is determined by R_T and C_T. It is defined as

$t_{OSC}=\frac{5R_T{C}_T}{48}+120\mathit{ns}$

The maximum operating frequency is 1 MHz. The phase shift between the two sets of signals is controlled by the ramp voltage and the error amplifier output having a 7-MHz bandwidth.

12.11.1 Soft-Switched DC-DC Flyback Converter

A simple approach that can turn an existing hard-switched converter design into a soft-switched one is shown in Fig. 12.40. The key advantage of the proposal is that many well proved and reliable hard-switched converter designs can be kept. The modification required is the addition of a simple circuit (consisting an auxiliary winding, a switch, and a small capacitor) to an existing isolated converter [36]. This principle, which is the modified version of the EPQR technique for isolated converter, is demonstrated in an isolated soft-switched flyback converter with multiple outputs. Other advantageous features of the proposal are as follows:

• All switches and diodes of the converter are “fully” soft-switched, that is, soft-switched at both turn-on and turn-off transitions under zero-voltage and/or zero-current conditions.

• The leakage inductance of each winding in the flyback transformer forms part of the resonant circuit for achieving ZVS and ZCS of all switches and diodes.

• The control technique is simply PWM-based as in standard hard-switched converters.

• The soft-switched technique is a proved method for EMI reduction [37].

12.11.2 A ZCS Bidirectional Flyback DC-DC Converter

A bidirectional flyback DC-DC converter that uses one auxiliary circuit for both power flow directions is proposed in Fig. 12.41 [38]. The methodology is based on extending the unidirectional soft-switched flyback converter in Ref. [36] and replacing the output diode with a controlled switch, which acts as either a rectifier [39] or a power control switch in the corresponding power flow direction. An auxiliary circuit that consists of a winding in the coupled inductor, a switch, and a capacitor converts the hard-switched design into a soft-switched one. The operation is the same as [36] in the forward mode. An extended-period resonant stage [34] is introduced when the power control switch is on. Conversely, in the reverse mode, a complete resonant stage is initiated before the main switch is off. In both the power flow operations, the leakage inductance of the coupled inductor is used to create zero-current switching conditions for all switches.

12.14.1 Resonant (Pulsating) DC Link Inverter

Resonant DC link converter for DC-AC power conversion was proposed in 1986 [42]. Instead of using a nominally constant DC link voltage, a resonant circuit is added to cause the DC link voltage to be pulsating at a high frequency. This resonant circuit theoretically creates periodic zero-voltage duration at which the inverter switches can be turned on or off. Fig. 12.48 shows the schematics of the pulsating link inverter. Typical DC link voltage, inverter's phase voltage, and the line voltages are shown in Fig. 12.49. Because the inverter switching can only occur at zero-voltage duration, integral pulse-density modulation (IPDM) has to be adopted in the switching strategy.

Analysis of the resonant DC link converter can be simplified by considering that the inverter system is highly inductive. The equivalent circuit is shown in Fig. 12.50.

The link current I_x may vary with the changing load condition but can be considered constant during the short resonant cycle. If switch S is turned on when the inductor current is I_Lo, the resonant DC link voltage can be expressed as

$V_c\left(t\right)=V_s+{\mathrm{e}}^{-\alpha t}\left[-V_s\mathit{cos}\left(\omega t\right)+\omega L{I}_M\mathit{sin}\left(\omega t\right)\right]$

and inductor current i_L is

$i_L\left(t\right)\approx I_x+{\mathrm{e}}^{-\alpha t}\left[I_{M}cos\left(\omega t\right)+\frac{V_s}{\omega L}sin\left(\omega t\right)\right]$

where

$\alpha =\frac{R}{2L}$

${\omega }_o={\left(LC\right)}^{-0.5}$

$\omega ={\left({{\omega }_0}^2–{\alpha }^2\right)}^{0.5}$

and

$I_M=I_{Lo}-I_x$

The resistance in the inductor could affect the resonant behavior because it dissipates some energy. In practice, (i_L−I_x) has to be monitored when S is conducting. S can be turned on when (i_L−I_x) is equal to a desired value. The objective is to ensure that the DC link voltage can be resonated to zero-voltage level in the next cycle.

The pulsating DC link inverter has the following advantages:

• Reduction of switching loss.

• Snubberless operation.

• High switching frequency (>18 kHz) operation becomes possible, leading to the reduction of acoustic noise in inverter equipment.

• Reduction of heat sink requirements and thus improvement of power density.

This approach has the following limitations:

• The peak DC pulsating link voltage (2.0 per unit) is higher than the nominal DC voltage value of a conventional inverter. This implies that power devices and circuit components of higher voltage ratings must be used. This could be a serious drawback because power components of higher voltage ratings not only are more expensive but also usually have inferior switching performance than their low-voltage counterparts.

• Although voltage clamp can be used to reduce the peak DC link voltage, the peak voltage value is still higher than normal, and the additional clamping circuit makes the control more complicated.

• Integral pulse-density modulation has to be used. Many well-established PWM techniques cannot be employed.

Despite these advantages, this resonant converter concept has paved the way for other soft-switched converters to develop.

12.14.2 Active-Clamp Resonant DC Link Inverter

In order to solve the high voltage requirement in the basic pulsating DC link inverters, active-clamping techniques (Fig. 12.51) have been proposed. The active clamp can reduce the per unit peak voltage from 2.0 to about 1.3–1.5 [44]. It has been reported that operating frequency in the range of 60–100 kHz has been achieved [48] with an energy efficiency of 97% for a 50 kVA drive system.

The design equations for active-clamp resonant-link inverter are

$T_L=\frac{1}{f_L}=2\sqrt{L_r{C}_r}\left({cos}^{-1}\left(1-k\right)+\frac{\sqrt{k\left(2-k\right)}}{k-1}\right)$

where T_L is the minimum link period, f_L is the maximum link frequency, and k is the clamping ratio. For the active-clamp resonant inverter, k is typically 1.3–1.4 per unit.

The rate of rise of the current in the clamping device is

$\frac{di}{dt}=\frac{\left(k-1\right)V_s}{L_r}$

The peak clamping current required to ensure that the DC bus return to 0 V is

$I_{sp}=V_s\sqrt{\frac{k\left(2-k\right)C_r}{L_r}}$

In summary, resonant (pulsating) DC link inverters offer significant advantages such as the following:

• High switching frequency operation

• Low dv/dt for power devices

• ZVS with reduced switching loss

• Suitable for 1–250 kW

• Rugged operation with few failure mode

12.14.3 Resonant DC Link Inverter With Low Voltage Stress [49]

A resonant DC link inverter with low voltage stress is shown in Fig. 12.52. It consists of a front-end resonant converter that can pull the DC link voltage down just before any inverter switching. This resonant DC circuit serves as an interface between the DC power supply and the inverter. It essentially retains all the advantages of the resonant (pulsating) DC link inverters. But it offers extra advantages such as the following:

• No increase in the DC link voltage when compared with conventional hard-switched inverter. That is, the DC link voltage is 1.0 per unit.

• The zero-voltage condition can be created at any time. The ZVS is not restricted to the periodic zero-voltage instants as in resonant DC link inverter.

• Well-established PWM techniques can be employed.

• Power devices of standard voltage ratings can be used.

The timing program and the six operating modes of this resonant circuit are as shown in Figs. 12.53 and 12.54, respectively.

(1) Normal mode
This is the standard PWM inverter mode. The resonant inductor current i_Lr(t) and the resonant voltage V_cr(t) are given by

$i_{Lr}\left(t\right)=0$

$v_{Cr}\left(t\right)=V_s$

where V_s is the nominal DC link voltage.

(2) Mode 1 (Initiating mode): (t₀−t₁)
At t₀, mode 1 begins by switching on T₂ and T₃ on with zero current. i_Lr(t) increases linearly with a di/dt of V_s/L_r. If i_Lr(t) is equal to the initialized current I_i, T₁ is zero-voltage turned off. If (I_s−I_o)<I_i, then the initialization is ended when i_Lr (t) is equal to I_i, where I_s is the current flowing into the DC inductor L_dc. If (I_s−I_o)>I_i, then this mode continues until i_Lr (t) is equal to (I_s−I_o). The equations in this interval are

$\begin{array}{c}{i}_{Lr}\left(t\right)=\frac{V_s}{L_r}t\\ v_{Cr}\left(t\right)=V_s\\ i_{Lr\left(t_{{}^1}\right)}=\frac{V_s}{L_r}{t}_1=I_i\end{array}$

(3) Mode 2 (Resonant mode): (t₁−t₂)
After T₁ is turned off under ZVS condition, resonance between L_r and C_r occurs. V_cr (t) decreases from V_s to 0. At t₂, i_Lr (t) reaches the peak value in this interval. The equations are

$\begin{array}{c}{i}_{Lr}\left(t\right)=\frac{V_s}{Z_r}sin\left({\omega }_{r}t\right)+\left[I_1+\left(I_o-I_s\right)\right]cos\left({\omega }_{r}t\right)-\left(I_o-I_s\right)\\ V_{Cr}\left(t\right)=-V_{s}cos\left({\omega }_{r}t\right)-\left[I_1+\left(I_o-I_s\right)\right]Z_{r}sin\left({\omega }_{r}t\right)\\ i_{Lr}\left(t_2\right)=I_2=I_{Lr,\mathit{peak}}\\ V_{Cr}\left(t_2\right)=0\end{array}$

where

$Z_r=\sqrt{\frac{L_r}{C_r}}\mathrm{and}{\omega }_r=\frac{1}{\sqrt{L_r{C}_r}}$

(4) Mode 3 (Freewheeling mode): (t₂−t₃)
The resonant inductor current flows through two freewheeling paths (T₂-L_r-D₂ and T₃-D₁-L_r). This duration is the zero-voltage period created for ZVS of the inverter and should be longer than the minimum on and off times of the inverter's power switches:

$i_{Lr}\left(t\right)=I_2$

$v_{Cr}\left(t\right)=0$

(5) Mode 4 (Resonant mode): (t₃−t₄)
This mode begins when T₂ and T₃ are switched off under ZVS. The second half of the resonance between L_r and C_r starts again. The capacitor voltage V_cr (t) increases back from 0 to V_s and is clamped to V_s. The relevant equations in this mode are

$\begin{array}{c}{i}_{Lr}\left(t\right)=\left[I_2-\left(I_{\mathit{on}}-I_s\right)\right]cos\left({\omega }_{r}t\right)-\left(I_{\mathit{on}}-I_s\right)\\ V_{Cr}\left(t\right)=\left[I_2-\left(I_{\mathit{on}}-I_s\right)\right]Z_{r}sin\left({\omega }_{r}t\right)\\ i_{Lr}\left(t_4\right)=I_3\\ V_{Cr}\left(t_4\right)=V_s\end{array}$

where I_on is the load current after the switching state.

(6) Mode 5 (Discharging mode): (t₄−t₅)
In this period, T₁ is switched on under ZV condition because V_cr (t)=V_s. The inductor current decreases linearly. This mode finishes when i_Lr (t) becomes zero:

$\begin{array}{c}{i}_{Lr}\left(t\right)=-\frac{V_s}{L_r}t+I_3\\ v_{Cr}\left(t\right)=V_s\\ i_{Lr}\left(t_5\right)=0\end{array}$

12.14.5 RPI and ARCPI

The RPI integrates the resonant components with the output filter components L_f and C_f. The load is connected to the midpoint of the DC bus capacitors as shown in Fig. 12.65. It should however be noted that the RPI can be described as a resonant inverter. Fig. 12.66 shows a single-phase RPI. Its operation can be described with the timing diagram in Fig. 12.67. The operating modes are included in Fig. 12.68. The RPI provides soft switching for all power switches. But it has two disadvantages. First, the power devices have to be switched continuously at the resonant frequency determined by the resonant components. Second, the power devices in the RPI circuit require a 2.2–2.5 p.u. current turn-off capability.

An improved version of the RPI is the ARCPI. The ARCPI for one inverter leg is shown in Fig. 12.69. Unlike the basic RPI, the ARCPI allows the switching frequency to be controlled. Each of the primary switches is closely paralleled with a snubber capacitor to ensure ZV turnoff. Auxiliary switches are connected in series with an inductor, ensuring that they operate under ZC conditions. For each leg, an auxiliary circuit comprising two extra switches A1 and A2, two freewheeling diodes, and a resonant inductor L_r is required. This doubles the number of power switches when compared with hard-switched inverters. Fig. 12.70 shows the three-phase ARCPI system. Depending on the load conditions, three commutation modes are generally needed. The commutation methods at low and high current are different. This makes the control of the ARCPI very complex. The increase in control and circuit complexity represents a considerable cost penalty [52,53].