40.4.1 Converter Model

The traditional three-phase VSI with RL load and VSI equivalent circuits are shown in Fig. 40.5 [11]. As shown, each leg can be represented as a dual-way switch, so only one switch can be active simultaneously in the same leg in order to avoid short circuit. The switching states S_a, S_b, S_c are controlled as follows:

$S_a=\left\{\begin{array}{ccccccc}\hfill 1,\hfill & \hfill \mathrm{if}\hfill & \hfill S_1\hfill & \hfill \mathrm{on}\hfill & \hfill \mathrm{and}\hfill & \hfill S_4\hfill & \hfill \mathrm{off}\hfill \\ \hfill 0,\hfill & \hfill \mathrm{if}\hfill & \hfill S_1\hfill & \hfill \mathrm{off}\hfill & \hfill \mathrm{and}\hfill & \hfill S_4\hfill & \hfill \mathrm{on}\hfill \end{array}\right.$

$S_b=\left\{\begin{array}{ccccccc}\hfill 1,\hfill & \hfill \mathrm{if}\hfill & \hfill S_2\hfill & \hfill \mathrm{on}\hfill & \hfill \mathrm{and}\hfill & \hfill S_5\hfill & \hfill \mathrm{off}\hfill \\ \hfill 0,\hfill & \hfill \mathrm{if}\hfill & \hfill S_2\hfill & \hfill \mathrm{off}\hfill & \hfill \mathrm{and}\hfill & \hfill S_5\hfill & \hfill \mathrm{on}\hfill \end{array}\right.$

$S_c=\left\{\begin{array}{ccccccc}\hfill 1,\hfill & \hfill \mathrm{if}\hfill & \hfill S_3\hfill & \hfill \mathrm{on}\hfill & \hfill \mathrm{and}\hfill & \hfill S_6\hfill & \hfill \mathrm{off}\hfill \\ \hfill 0,\hfill & \hfill \mathrm{if}\hfill & \hfill S_3\hfill & \hfill \mathrm{off}\hfill & \hfill \mathrm{and}\hfill & \hfill S_6\hfill & \hfill \mathrm{on}\hfill \end{array}\right.$

These switching states can be expressed as

$S=\frac{2}{3}\left(S_a+\mathrm{a}{S}_b+{\mathrm{a}}^2{S}_c\right)$

where a is called as a unitary vector and is equal to e^j2π/3. Finally, the inverter output voltage vector can be defined as a function of the switching state vector S by

$\mathrm{v}=V_{\mathit{dc}}\mathrm{S}$

where V_dc is the dc-link voltage.

Considering all the possible combinations of the switches (S_a, S_b, S_c), eight switching states and consequently eight voltage vectors can be obtained, as shown in Fig. 40.6. Six of these vectors (v₁–v₆) are defined as active vectors, while the other two (v₀, v₇) are defined as zero vector. Consequently, seven different voltage vectors are obtained as shown in Fig. 40.6.

40.4.2 Discrete-Time Model of Load for Prediction

The equivalent circuit of the three-phase VSI with RL load is shown in Fig. 40.7. The continuous-time model of the system can be expressed as

$\left[\begin{array}{c}\hfill v_{\mathit{aN}}\hfill \\ \hfill v_{bN}\hfill \\ \hfill v_{cN}\hfill \end{array}\right]=\left[\begin{array}{ccc}\hfill R\hfill & \hfill 0\hfill & \hfill 0\hfill \\ \hfill 0\hfill & \hfill R\hfill & \hfill 0\hfill \\ \hfill 0\hfill & \hfill 0\hfill & \hfill R\hfill \end{array}\right]\left[\begin{array}{c}\hfill i_a\hfill \\ \hfill i_b\hfill \\ \hfill i_c\hfill \end{array}\right]+\left[\begin{array}{ccc}\hfill L\hfill & \hfill 0\hfill & \hfill 0\hfill \\ \hfill 0\hfill & \hfill L\hfill & \hfill 0\hfill \\ \hfill 0\hfill & \hfill 0\hfill & \hfill L\hfill \end{array}\right]\frac{d}{dt}\left[\begin{array}{c}\hfill i_a\hfill \\ \hfill i_b\hfill \\ \hfill i_c\hfill \end{array}\right]+\left[\begin{array}{c}\hfill e_a\hfill \\ \hfill e_b\hfill \\ \hfill e_c\hfill \end{array}\right]+\left[\begin{array}{c}\hfill 1\hfill \\ \hfill 1\hfill \\ \hfill 1\hfill \end{array}\right]v_{nN}$

where R and L are the load resistance and the load inductance, respectively. This equation can be simplified as

$\mathbf{v}=R\mathbf{i}+L\frac{d\mathbf{i}}{dt}+\mathbf{e}$

where v is inverter output voltage vector, i is the load current vector, and e the load back-emf vector. The derivative of the output current vector can be obtained from

$\frac{d\mathbf{i}}{dt}=\frac{1}{L}\left[\left(\mathbf{v}-\mathbf{e}\right)-R\mathbf{i}\right]$

To use mathematical equations in the prediction model, discrete-time equations of the system must be obtained from continuous-time equations. To do that, the general structure of forward-difference Euler equation (40.18) can be used in order to compute the differential equations of the output current [12,13]:

$\frac{df}{dt}\approx \frac{f\left(x_0+h\right)-f\left(x_0\right)}{h}$

To estimate these variables in the next sampling time, the discretization equation can be defined as

$\frac{\mathrm{\Delta }f\left(k\right)}{\mathrm{\Delta }t}\approx \frac{f\left(k+1\right)-f\left(k\right)}{T_s}$

The continuous-time expression for the i_abc is given in (40.17). By substituting (40.19) into (40.17), the discrete-time model of the i_abc can be obtained as

$\mathbf{i}\left(k+1\right)=\left(1-\frac{R{T}_s}{L}\right)\mathbf{i}\left(k\right)+\frac{T_s}{L}\left(\mathbf{v}\left(k\right)-\hat{\mathbf{e}}\left(k\right)\right)$

where i(k+1) is the predicted output current vector at the next sampling time and ê(k) denotes the estimated back emf that can be calculated from (40.16) considering the measurements of the load voltage and current with the following expression;

$\hat{\mathbf{e}}\left(k-1\right)=\mathbf{v}\left(k-1\right)-\frac{L}{T_s}\mathbf{i}\left(k\right)-\left(R-\frac{L}{T_s}\right)\mathbf{i}\left(k-1\right)$

where $\hat{e}\left(k-1\right)$ is the estimated value of $e\left(k-1\right)$.

40.4.3 Cost Function Optimization

The objective of the cost function is to minimize the error between the reference currents (i_abc*(k)) and the predicted output currents ($i_{abc}\left(k+1\right)$) at the next sampling time. The cost function can be expressed in orthogonal coordinates as

$g=\left|i_{abc}^{⁎}\left(k\right)-i_{abc}^p\left(k+1\right)\right|=\left|i_{\alpha }^{⁎}\left(k\right)-i_{\alpha }^P\left(k+1\right)\right|+\left|i_{\beta }^{⁎}\left(k\right)-i_{\beta }^P\left(k+1\right)\right|$

where $i_{\alpha }^P\left(k+1\right)$ and $i_{\beta }^P\left(k+1\right)$ are the real and imaginary parts of the predicted load current vector, while $i_{\alpha }^{⁎}\left(k+1\right)$ and $i_{\beta }^{⁎}\left(k+1\right)$ are the real and imaginary parts of the reference load current. To simplify the analysis, it is assumed that the reference current does not change immediately in one sampling time. Thus, $i_{abc}^{⁎}\left(k+1\right)=i_{abc}^{⁎}\left(k\right)$ can be considered. On the other hand, this may introduce a one sample delay in the reference tracking, which can be neglected in high sampling frequency conditions. In general, the reference current is generated from an external control loop, for example, maximum power point tracking control loop.

The sketch map of the reference and predicted rotor currents is shown in Fig. 40.8 to illustrate how the proposed MPC strategy works. Here, the measured output current i_a(k) and voltage vectors v_0-7, which are given in Table 40.1, have been evaluated together to estimate the future output current i_a(k+1) values. As shown in Fig. 40.8, there are eight different predicted rotor current values at time k+1 and k+2. However, it can be seen from the figure that only v₂ and v₃ voltage vectors minimize the error of the output current at k+1 and k+2 instants, respectively. Thus, voltage vectors that minimize the cost function g are v₂ at k+1 and v₃ at k+2 are selected. In other words, corresponding voltage vector at each sample time is determined by the cost function according to the minimum error or distance between reference and predicted currents. As a result, it can be shown that v₂ and v₃ voltage vectors produce the lowest value of the cost function at k+1 and k+2 instants, respectively.

Table 40.1

Switching states and voltage vectors of three-phase VSI

Switching state	Sa	Sb	Sc	Voltage vector V
0	0	0	0	${\mathbf{V}}_{\mathbf{0}}=0$
1	1	0	0	${\mathbf{V}}_1=\frac{2}{3}{V}_{\mathit{dc}}$
2	1	1	0	${\mathbf{V}}_2=\frac{1}{3}{V}_{\mathit{dc}}+j\frac{\sqrt{3}}{3}{V}_{\mathit{dc}}$
3	0	1	0	${\mathbf{V}}_3=-\frac{1}{3}{V}_{\mathit{dc}}+j\frac{\sqrt{3}}{3}{V}_{\mathit{dc}}$
4	0	1	1	${\mathbf{V}}_4=-\frac{2}{3}{V}_{\mathit{dc}}$
5	0	0	1	${\mathbf{V}}_5=-\frac{1}{3}{V}_{\mathit{dc}}-j\frac{\sqrt{3}}{3}{V}_{\mathit{dc}}$
6	1	0	1	${\mathbf{V}}_6=\frac{1}{3}{V}_{\mathit{dc}}-j\frac{\sqrt{3}}{3}{V}_{\mathit{dc}}$
7	1	1	1	${\mathbf{V}}_7=0$

40.4.4 Control Algorithm

The MPC algorithm can be implemented as a “for” loop to predict future behavior of the system output, minimize the error between the reference and predicted output using predefined cost function, and store the index value of the corresponding switching state [14,15]. The flowchart of the MPC algorithm is given in Fig. 40.9. The control algorithm can be summarized by the following steps:

• Measure the output currents (i_abc).

• Estimate the back emf using Eq. (40.21).

• These measured and estimated values are used to predict output currents using the predictive model in Eq.(40.20).

• All predictions are evaluated using the predefined cost function.

• The optimal switching state that corresponds to the optimal voltage vector that minimizes the cost function is selected to be applied at the next sampling time.

Motivated by the aforementioned advantages of MPC and considering the multiobjective control requirements of neutral-point-clamped (NPC) inverter, in this subsection, MPC-based control technique for three-phase NPC inverter is presented. Here, two parameters, the output current and the capacitor voltages, are controlled by the MPC technique. Thus, multiobjective control requirement is solved with simple technique.

A. System Model
The used three-phase NPC inverter topology is illustrated in Fig. 40.10. Each leg of the inverter consists of four power switches with two diodes that allow the output terminal to be connected to the middle point of the split dc-link capacitors. This circuit configuration allows to generate three voltage levels at the output of the inverter according to the neutral point. The switching combinations are given in Table 40.2 [16]. Switching state variable S_x represents the switching state of phase x, with x=a, b, c, and it has three possible values denoted by positive, zero, and negative that represent the switching combinations that generate V_dc/2, 0, and−V_dc/2, respectively, at the output of the inverter phase.
The NPC inverter applies to the load 19 voltage vectors, which are generated from 27 switching states, as shown in Fig. 40.11 [16]. In addition to these switching states, for this application, one extra switching state is required to ensure shoot-through state. During this state, dc link must be short-circuited by single or multiple inverter legs.
The continuous-time expression for the output current (i_o) can be described by the following equation:

$L\frac{d\mathbf{i}\left(t\right)}{dt}=\mathbf{v}\left(t\right)-R\mathbf{i}\left(t\right)-\mathbf{e}\left(t\right)$

where R and L are the load resistance and inductance, respectively, v is the voltage vector generated by the inverter, e is the electromotive force of the load, and i is the load current vector. These vectors are defined as

$\left.\begin{array}{c}\hfill \mathbf{v}=\frac{2}{3}\left(V_a+a{V}_b+a^2{V}_c\right)\hfill \\ \hfill \mathbf{i}=\frac{2}{3}\left(i_a+a{i}_b+a^2{i}_c\right)\hfill \\ \hfill \mathbf{e}=\frac{2}{3}\left(e_a+a{e}_b+a^2{e}_c\right)\hfill \end{array}\right\}$

where $a=e^{j\left(2\pi /3\right)}$.

B. MPC-based control algorithm
The proposed MPC algorithm applied to the three-level NPC inverter is shown in Fig. 40.12. To predict the output current (i_o) and the capacitor voltages (v_C1 and v_C2) at the next sampling time, discrete-time model of the inverter must be defined. One way to obtain discrete-time models is to use the forward-difference Euler equation due to its simplicity. The derivative form dx(t)/dt is approximated by

$\frac{dx\left(k\right)}{dt}\approx \frac{x\left(k+1\right)-x\left(k\right)}{T_s}$

where T_s is the sampling time and x is one of the control parameters such as i and v_c12.

By substituting (40.23) into (40.25), the discrete-time model of the output current vector is

$\mathbf{i}\left(k+1\right)=\frac{T_s}{R{T}_s+L}\left[\frac{L}{T_s}\mathbf{i}+\mathbf{v}\left(k+1\right)-\mathbf{e}\left(k+1\right)\right]$

where i (k+1) is the predicted output current vector at the next sampling time.
The current prediction in (40.26) also requires an estimation of the future load back EMF e (k+1). It can be estimated by using a second-order extrapolation from present and past values. From (40.25) and the output voltage and current, resulting in the following expression:

$\hat{\mathbf{e}}\left(k\right)=\mathbf{v}\left(k\right)+\frac{L}{T_s}\mathbf{i}\left(k-1\right)-\frac{R{T}_s+L}{T_s}\mathbf{i}\left(k\right)$

where ê(k) is the estimated value of e(k).
Furthermore, the discrete-time equations of the capacitor voltage can be expressed by using (40.25):

$v_{C12}\left(k+1\right)=v_{C12}\left(k\right)+\frac{T_s}{C}{i}_{C12}\left(k\right)$

where v_C12(k+1) is the predicted capacitor voltages, at the next sampling time.
To use reference value in the cost function, this value must be extrapolated to k+1 instant. To do that, Lagrange's extrapolation can be used [17]. Once the extrapolated reference values obtained, they are applied in the cost function optimization block as can be seen in Fig. 40.12. To handle the desired control objectives, two terms are required to be defined in the cost function. The terms are responsible for minimizing the error between the reference and predicted values. The defined cost function is

$\begin{array}{c}g\left(k+1\right)=\left|i_{\alpha }^{⁎}\left(k+1\right)-i_{\alpha }\left(k+1\right)\right|+\left|i_{\beta }^{⁎}\left(k+1\right)-i_{\beta }\left(k+1\right)\right|\\ +\lambda \left|v_{C1}\left(k+1\right)-v_{C2}\left(k+1\right)\right|\end{array}$

where λ is the weighting factor.

C. Simulation Results
The simulation of the proposed system was performed using Matlab/Simulink environment. The NPC inverter topology, shown in Fig. 40.10, is used in the simulation. The parameters used in the simulation are summarized in Table 40.3.
The simulation result of steady-state analysis is shown in Fig. 40.13. The reference output currents track their references with high accuracy, while the dc-link voltage is kept balanced by the MPC. Fig. 40.14 shows the simulation result of the transient response of the proposed control technique. The output reference current is step changed from 10 to 15 A. It can be seen that the dc-link voltage remains balanced at 150 V, with small deviations during the transient.

40.5.2 33-Level Input Switched Inverter

The control of multilevel inverters (MIs) is quite challenging and requires a flexible approach to success multiple control objectives. The MPC technique is extremely effective to control MIs due to its considerable advantages over the traditional linear controller. This subsection presents MPC technique for 33-level input switched multilevel inverter (ISMI) to verify MPC's effectiveness in the high-level MI topologies.

A. Overview of the ISMI
The circuit diagram of the single-phase 33-level ISMI with PV generation system is shown in Fig. 40.15 [18]. The ISMI topology has two stages, consisting of the multilevel module and H-bridge inverter. Output voltage level of this topology is given by N_level=2n+1, where n represents the number of power legs. In order to obtain 33 voltage level, n should be 16 for this application.
In the first stage, each leg includes two power switches that allow bidirectional current flow. Sixteen capacitors are also employed to divide the dc-link voltage equally to V_dc/16, as seen in Fig. 40.15. The bidirectional power switches of each leg should be gated on sequentially to obtain desired voltage level. It is noticeable that more than one leg switches cannot be turned on at the same time because input dc source would be short circuit. Moreover, the switching state of the multilevel module is determined by the output current direction and the voltage level of the multilevel module. For example, when the first leg (S_1ab) is turned on and other legs are turned off, the output voltage (v_x) of the multilevel module is V_dc, the current flows through S_1a and D_1b. The proposed ISMI has 64 switching states that produce thirty-three voltage levels. However, it should be noted that the voltage level of the multilevel module is only 16 positive levels. Therefore, to obtain positive and negative levels, the traditional H-bridge inverter is employed in the second stage of this topology, as seen in Fig. 40.15. The H-bridge inverter provides voltage gains, which are +1, 0, −1, to ensure positive, zero, and negative voltage on the output. The switching states of 33-level ISMI are given in Table 40.4.

B. MPC-based control algorithm for 33-level ISMI
The block diagram of the MPC strategy applied to the current control for the 33-level grid-connected ISMI is shown in Fig. 40.16. The predictive model of the system needs output current information in order to generate reference current. Grid phase angle information is also required to generate reference current in same phase with the grid voltage. In this case, the output current i_o(k) and the grid voltage v_g(k) need to be measured. The phase angle (θ_e) of the reference current is obtained from PLL block. Thus, generated reference current will be in same phase and frequency with the grid voltage.
To control the output current (i_o) of the ISMI, a discrete-time model of the i_o must be defined. To do that, the averaged model of the system, which is defined in (40.30), can be used:

$\frac{d}{dt}{i}_o\left(t\right)=\frac{-r_L}{L}.i_o\left(t\right)+\frac{1}{L}v\left(t\right)$

where r_L and L are the resistance and inductance of the filter inductor, respectively, i_o(t) is the average inverter output current, and v(t) is the voltage, averaged in a switching period and applied to the inductor. The voltage on the inductor can be written as v(t)=v_o(t)−v_g(t), where v_g(t) is the grid voltage and v_o(t) is the averaged value of the inverter voltage.
The general solution of the differential equation is

$i_o\left(t\right)=e^{\frac{-r_L}{L}\left(t-t_0\right)}{i}_o\left(t_0\right)+{\displaystyle \underset{t_0}{\overset{t}{\int }}{e}^{\frac{-r_L}{L}\left(t-\tau \right)}\frac{1}{L}v\left(\tau \right)d\tau }$

where lower (t₀) and upper (t) limits of integration can be defined as kT_s and (k+1)T_s, respectively, to obtain discrete-time model with sampling period T_s.

$i_o\left(k+1\right)=e^{\frac{-r_L}{L}{T}_s}{i}_o\left(k\right)+\frac{1}{L}{\displaystyle \underset{k{T}_s}{\overset{\left(k+1\right)T_s}{\int }}{e}^{\frac{-r_L}{L}\left(\left(k+1\right)T_s-\tau \right)}v\left(\tau \right)d\tau }$

where i_o(k)≡i_o(kT_s). T_s is usually small enough to satisfy (r_LTs/L) <<l; thus, (40.32) can be approximated as

$i_o\left(k+1\right)=e^{\frac{-r_L}{L}{T}_s}.i_o\left(k\right)+\frac{1}{L}{\displaystyle \underset{k{T}_s}{\overset{\left(k+1\right)T_s}{\int }}\left(v_o\left(\tau \right)-v_g\left(\tau \right)\right)d\tau }$

Since d(t) is actualized every sampling period, we can assume that v_o(t) is constant between two sampling instants:

$v_o\left(t\right)=v_o\left(k{T}_s\right)\text{≡}{v}_o\left(k\right)$

if t $\in$ [ kT_s,(k+1)T_s]. On the other hand, as the sampling frequency is much higher than the grid frequency, we can approximate v_g(t) linearly between two sampling instants:

$v_g\left(t\right)\approx v_g\left(kT\right)+\frac{v_g\left(\left(k+1\right)T_s\right)-v_g\left(k{T}_s\right)}{T_s}$

if t ϵ[kT_s,(k+1)T_s]. Discrete-time model of the output current can be obtained from substituting (40.34) and (40.35) into (40.33):

$i_o\left(k+1\right)=e^{\frac{-r_L}{L}{T}_s}.i_o\left(k\right)+\frac{T_s}{L}\left(v_o\left(k\right)-{\overline{v}}_g\left(k\right)\right)$

where ${\overline{v}}_g\left(k\right)=\left(1/2\right).\left(v_g\left(k+1\right)+v_g\left(k\right)\right)$ is the averaged value of the grid voltage between two samples.
The cost function is an important stage of the MPC technique. To minimize the error between the reference and the predicted values in the next sampling time, the cost function must be selected according to specific design criteria. In this study, in order to control the output current, the cost function is defined as

$g={\left[i_o^{⁎}\left(k+1\right)-i_o\left(k+1\right)\right]}^2$

where i_o*(k+1) is the reference output current and i_o(k+1) is the predicted output current in the next sampling time.

C. Implantation results
To verify the proposed MPC scheme for 33-level ISMI, experimental studies have been carried out for different operating conditions. The parameters of the system are summarized in Table 40.5.
Fig. 40.17A and B shows the experimental results of steady-state performance of the MPC-based current controller under normal and poor grid conditions. The results show that even with poor grid condition, the MPC-based current controller has an excellent steady-state performance.
Fig. 40.18 shows the transient response results of the proposed MPC. The reference current is changed from 30 to 10 A and vice versa in order to observe the response of the proposed control technique. It can be seen that the transient time is very short, controller response is very fast, and the output current tracks its reference with high accuracy.
As the proposed control method is based on the system model, the algorithm is also tested to verify the robustness against the mismatch with filter parameter. To do that, the filter inductance (L_f) is consecutively set at 0.5*L, L, and 1.5⁎L, which is the typical case in distributed generation systems where the power system impedance changes randomly. It is remarkable that the new filter inductance value is not entered to the controller. The control algorithm uses a rated filter inductance value (L=10 mH). Results are shown in Fig. 40.19A–C. It is clear that, when the modeled inductance value is smaller than selected value (0.5*L), the mismatch causes steady-state errors, and when the modeled inductance value is bigger than selected value (1.5*L), the mismatch causes current oscillation. However, it can be observed from results that the mismatch of the filter model slightly affects the system performance.