Chapter 9. The Diamond 232L CPU Core
Some people have told me they don’t think a fat penguin really embodies the grace of Linux.
—Linus Torvalds
The Diamond 232L CPU core is a general-purpose RISC processor core. Like the 212GP core, the Diamond 232L includes a cache controller but the Diamond 232L processor’s cache controller operates larger, 16-Kbyte, 4-way set-associative instruction and data caches. The Diamond 232L CPU also includes a demand-paged memory-management unit (MMU) with translation lookaside buffer (TLB) and memory protection to support large operating systems such as Linux. Even with these features, the Diamond 232L CPU runs at 233 MHz, consumes only 0.8 mm2 of silicon, and dissipates approximately 212μ W/MHz when implemented in a 130 nm, G-type process technology.
The Diamond 232L core brings the performance benefits of a full-featured 32-bit RISC CPU to bear on the designated tasks:
Large 4-Gbyte address space
32-bit computations
Large 32-entry register file
Separate 16-Kbyte, 4-way, set-associative instruction and data caches
Demand-paged MMU with TLB
5-stage pipelined operation resulting in a 266-MHz maximum clock rate in 130 nm LV technology
The Diamond 232L processor core has a 32-bit version of the general-purpose processor interface (PIF) bus for global system-on-chip (SOC) communications. An optional AMBA bus bridge supplied with the Diamond 232L processor core adapts the PIF to peripheral devices designed for the AMBA AHB-Lite bus. Unlike the Diamond 108Mini and 212GP controller cores, the Diamond 232L CPU core has no local instruction- or data-RAM interfaces. Instead, the Diamond 232L CPU’s large instruction and data caches act like local memories.