5.2. The Consequences of Architectural Evolution

One of the many consequences of this years-long SOC architectural evolution is a huge proliferation of processor-core varieties, each optimized for some particular evolutionary stage in system design. Another consequence is that system architects worldwide use a highly varied mixture of all the system architectures shown above, and even more variations not shown in these five figures but discussed later in this chapter.

Successful processor core architectures for SOC designs must have a large number of memory and I/O ports to support all of the connection schemes shown in Figures 5.1–5.6. Tensilica’s Xtensa and Diamond Standard Series processor cores do, as shown in Figure 5.7.

Figure 5.7. The configurable Xtensa microprocessor core has a large number of memory interfaces and I/O ports that support all of the system interconnection schemes shown in Figures 5.1–5.5 and a few more discussed later in this chapter.

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