Preface
In the 21st century, system-on-chip (SOC) design styles are changing. Not because they can but because they must. Moore’s law and the side benefits of classical semiconductor scaling (faster transistors running at lower power at each new processing node) parted company when the semiconductor industry hit the 130 nm processing node just after the turn of the century. As a result, on-chip clock rates stopped rising as quickly as they had and power levels stopped falling as quickly as they had. These two side effects of lithographic scaling, usually (and incorrectly) attributed to Moore’s law, were actually developed by IBM’s Robert Dennard and his team in the early 1970s. On-chip clock rate and power dissipation have tracked Moore’s law for nearly 30 years. But no longer.
The net effect of this split between Moore’s law and classical scaling is to remove two of SOC design’s key assumptions:
The next processing node promises faster processors.
Lower energy consumption for increasingly complex systems is just one processing node away.
As a result, SOC designers must become more sophisticated.
This is not an unbearable burden. SOC design first appeared around 1995 when designers started to place processor cores on their ASIC designs. Since then, system architectures developed for SOC designs have, more often than not, closely resembled microprocessor-based, board-level systems that had been designed in the 1980s. However, Moore’s law has continued to deliver transistors and interconnect in abundance so there’s really no reason that system designers should be burdened with system-design rules of thumb developed under the constraints of packaged processors and layout rules developed for circuit boards.
This book advocates a departure from these decades-old design styles, although not as radical a departure as others may promote. System block diagrams need not change substantially to take full advantage of the resources available to SOC designers in the 21st century. However, many more blocks in these existing block diagrams can now be implemented with processors rather than hand-designed, custom-built logic blocks. The result of this change alone will bring large benefits to system design. Blocks that were previously hard-wired can now become firmware-programmable, which reduces design risk by allowing the SOC’s function to change without the need to re-spin the chip.
In addition to advocating a shift to multiple-processor SOC (MPSOC) design, this book also promotes the idea that the almost universal use of globally shared buses should be substantially reduced. Buses are shared resources and came into existence in the 1970s to accommodate the pin limitations of packaged microprocessors. Such limitations don’t exist on an SOC and these no-longer-in-effect limitations should therefore cease to hobble system architects. New, more efficient ways of interconnecting on-chip blocks exist and they should be used to improve system performance and reduce power dissipation.
None of these changes should cause experienced system designers any headaches. All of the concepts advocated in this book should be familiar to any system designer. The suggested departure from conventional design is more a shift in perspective that favors one type of existing design style (processor-based block implementation) over another (custom-designed logic). The means to achieving this shift is through the use of configurable and pre-configured processor cores that provide substantially better (orders of magnitude) system performance than widely used, general-purpose processor cores.
To help system designers and architects make this shift, this book is organized as follows:
Chapter 1: Introduction to 21st-Century SOC Design provides an overview of conventional SOC design as it exists today. It discusses the use of processors in SOC architectures and gives a history of processor-based design going back to the introduction of the original microprocessor in 1971. It discusses the tradeoffs and engineering decisions made when architecting an SOC.
Chapter 2: The SOC Design Flow covers the design steps currently used to develop ASICs and SOCs and then proposes a new, system-level design style that should precede the implementation phase. SOC designers currently jump into the implementation phase prematurely (let’s get something coded now!) by relying on decades-old assumptions that are no longer valid.
Chapter 3: Xtensa Architectural Basics introduces the concept of a configurable, extensible microprocessor core for SOC design and discusses a specific processor architecture that serves as the foundation for a very broad family of configurable and pre-configured processor cores.
Chapter 4: Basic Processor Configurability lays out the many aspects of processor configurability and discusses how they can be used to boost SOC performance while cutting power dissipation.
Chapter 5: MPSOC System Architectures and Design Tools discusses the many ways, both good and bad, to architect an SOC. It then discusses how to best implement the good ways.
Chapter 6: Introduction to Diamond Cores introduces the six members of the Diamond Standard Series of pre-configured, 32-bit processor cores that have been built using Xtensa configurable-processor technology for specific target applications.
Chapters 7–12 include detailed explanations of each Diamond processor core, including the 108Mini and 212GP controller cores, the 232L and 570T CPUs, and the 330HiFi and 545CK DSPs. Each chapter also illustrates one or more ways to use each processor core in a system.
Chapter 13: Using Fixed Processor Cores in SOC Designs takes the reader deeper into the realm of system design based on multiple processor cores. It also discusses the mixing of pre-configured and configurable cores in system designs.
Chapter 14: Beyond Fixed Cores reintroduces the topic of configurable cores and applies them to the system designs discussed in the previous chapter. It also discusses the mixing of pre-configured and configurable cores in system designs.
Chapter 15: The Future Of Soc Design looks at the design challenges that remain.