Chang, H., Cooke, L., Hunt, M., Martin, G., McNelly, A. and Todd, L., Surviving the SOC Revolution: A Guide to Platform-Based Design, Kluwer Academic Publishers, 1999.

Donlin, A., “Transaction Level Modeling: Flows and Use Models,” International Conference on Hardware/Software Codesign and System Synthesis, 2004, pp. 75–80.

Gries, M. and Keutzer, K. (eds), Building ASIPS: The MESCAL Methodology, Springer, 2005.

Keating, M. and Bricaud, P., Reuse Methodology Manual for System-on-a-Chip Designs, Kluwer Academic Publishers, 1999.

Leibson, S. and Kim, J., “Configurable processors: a new era in chip design,” IEEE Computer, July 2005, pp. 51–59.

Martin, G. and Chang, H., Winning the SOC Revolution: Experiences in Real Design, Kluwer Academic Publishers, 2003.

Panda, P. R., Dutt, N. and Nicolau, A., Memory Issues in Embedded Systems-On-Chip, Kluwer Academic Publishers, 1999.

Pieter van der Wolf, et al, “Design and programming of embedded multiprocessors: an interface-centric approach,” International Conference on Hardware/Software Codesign and System Synthesis, 2004, pp. 206–217.

Rowen, C. and Leibson, S., Engineering the Complex SOC, Prentice-Hall, 2004.

Smit, G., “An Energy Efficient-Reconfigurable Circuit-Switched Network-on-Chip,” International SOC Conference, Tampere, Finland, November 2005.