3.1   BACKGROUND TO THE FPGA CONCEPT

3.1.1   History

During the 1960s digital systems were built from small-scale integrated circuits and transistors interconnected on a printed circuit board (PCB). These transistor–transistor logic (TTL) components were small enough that their functions were applicable to almost all digital designs (e.g., it is hard to think of a digital system that could not make use of a 7400 quad NAND gate). This meant that it was commercially attractive to provide a library of such components that were electrically compatible and could be connected to build the target system. As the number of transistors per chip increased, manufacturers realized they had a problem on their hands: the so-called “part-number” problem. With increasing transistor count, logic parts became more specialized and hence usable in fewer systems—for example, an LSI part like the 74LS275 Wallace Tree Multiplier is not useful in most systems. At the same time, the design and manufacturing cost of the parts increased with transistor count. For this reason catalog logic families stalled at the LSI level. Newer structures were required to take advantage of VLSI—there were three approaches:

1. Microprocessors/memories: Microprocessors and memory chips are attractive to the component manufacturer as catalog items since they can be used for programmable systems resulting in high volume sales. However, microprocessors are fundamentally unsuited to many traditional logic applications where instantaneous computation of simple functions is required.
2. Programmable read-only memories (PROMs) and programmable array logic (PALs): Any combinational logic function with a fixed number of inputs and outputs can be implemented as a lookup table of outputs against inputs in a PROM. Many architectural variants for implementing combinational logic have grown up around this simple idea.
3. Application-specific integrated circuits (ASICs): ASIC technology recognized that because the functionality of a VLSI logic device is application specific, there will necessarily be a large number of such devices. This implied that ASIC design must be done by systems engineers with applications knowledge rather than IC designers employed by the manufacturer with detailed knowledge of the technology. The key step in accomplishing this transfer was to provide systems engineers with the same model of design they were used to—libraries of simple primitive devices interconnected on a substrate—and make designing ICs as close as possible to designing PCBs. This led to the channeled gate array architecture, which although relatively inefficient in its use of silicon, is close to the PCB model of design. By limiting use of the underlying technology, it becomes possible to produce correct designs on first-silicon, thus avoiding costly redesign cycles. This architecture provides an array of identical basic logic building blocks with wiring channels that can be selectively connected to implement desired functions.

FPGA technology can be seen as a logical extension of these three approaches made possible by improvements in the performance and density of VLSI technology. The three main classes of FPGAs are as follows:

1. Computational logic arrays: These devices extend the processor/memory paradigm by implementing algorithms at the gate level in a reprogrammable structure.
2. Structured PALs: These devices extend the PROM/PAL paradigm by using the density of VLSI to create a more general-purpose device capable of implementing the functionality of several simple PALs interconnected on a PCB.
3. Channeled FPGAs: These devices extend the ASIC paradigm by producing a field-programmable structure with similar capabilities and user interface to that for gate arrays, but avoiding the costly and time-consuming design cycle required for a custom chip.

These three families of devices are synthesized from a relatively small toolkit of primitive circuit elements, and so there is, despite their different philosophies, a strong similarity between them and a clearly identifiable FPGA or configurable logic product class.

We now examine the three classes of configurable logic devices in turn.