CMOS THz Wireline Communication 317
incorporating SRR unit-cell into a stack, the magnetic resonance frequency
decreases as well, in return leads to a much more compact desig n.
Figure 14.12(a) illustrated the insertion loss (isolation) at on (off) state,
respectively. It shows that the modulator has an insertion loss of 5dB and
28dB isolation at point 1 (140 GHz), leading to 23dB extinction ration, which
is hardly achieved by MOS-based modulator at the same frequency. As the
structure is compact, the insertion loss is mainly attributed to the energy cou-
pling into the inner rings as well as the input reflection in the on state. Even
though the inner rings have not been shown in Figure 14.9, they cannot be
omitted in real design. A possible solution is to increase the g ap between the
inner/outer rings. However, the corresponding coupling factor will be reduced,
in return degrades the magnetic resonation. As such, there is a trade-off be-
tween the insertion loss and isolation. In fa ct, from Figure 14.12(a) one can
choose an o ther operation frequency, e.g., point 2 (∼126GHz) in which the
insertion loss is only 2.5 dB while the isolatio n is 15 dB. It can also achieve an
extinction ratio of 12.5dB. It can also be observed that the operation band-
width of the proposed modulator is wider than that of the pure stacking SRR
structure (Figure 14.11(b)). The bandwidth of achieving over 10dB extinc-
tion ratio is larger than 20GHz. Owing to the high extinction ratio by the
proposed modula tor, a tra nsient communication with data rate up to 20Gbps
is conducted as shown in Figure 14.12(b). A buffer chain is designed first to
mimic more real IO design, and its output swing can cover from rail (0 V) to
rail (1.2 V) with clean eye. A 140-GHz continuous wave is applied to the RF
input and the modulator is controlled by the random bit stream generator .
The rising and falling times of the applied baseband signal are 4ps, and the
minimum pulse width of data is 54ps. Figure 14.12(b) shows the modulated
signal. It can be observed tha t the data patterns can be clearly distinguished.
Here, the on/off amplitude ra tio is at le ast 10 which coincides with the over
20-dB e xtinction ratio. Different from the optical scenario in which a pulse
generator is used to drive the ring modulator with large output swing (>10V)
[313, 286], the improved extinction ratio here ca n be achieved by nominal
voltage level. All paras itics, including the driver chain output capacitances
and loading capacitances should be included in the overa ll design iteration to
further increas e the data sp eed. As a comparison, recent works show the data
rates are limited not higher than 13 Gbps [310, 311, 312, 313, 316, 317, 318]
with large are a. The performance summary and comparison are given in Table
14.1. In sum, the proposed passive modulator can adapt to a higher data rate
with much more compact area than recent modulator designs.
14.4 Multi-Channel I/O Transceiver
The increa sing demand for higher data rates in wireline communication sys-
tems has created the urge to seek for innovative high-bandwidth channels
capable of supporting tens of g igabits per second (>10Gbps) communication
318 Design of CMOS Millimeter-Wave and Terahertz Integrated Circuits
1.2V
Full
Swing
SRR
Modulator
140G
Carrier
ASK
Data In
To
Channel
0
0 0
0
1
1
1 1
Extinction Ratio>20dB
0 50 100 150 200 250 300
-30
-25
-20
-15
-10
-5
0
S21 (dB)
Frequency (GHz)
On
Off
1
2
(a)
(b)
Figure 14.12: (a) The insertion loss (isolation) at on (off) state of
the proposed modulator and the resulting extinction ratio, (b) the
transient waveform of the modulated signal after the proposed mod-
ulator.
Table 14.1: Perfo rmances Summ ary and Comparison
Ref. [311] [313] [319] [317] [318] This
work
Freq .(GH z) 46 optics optics 60 122.5 >140
Extinction Ratio (dB) >50 8 8.1 26.6 18.2 23
Data Rate (Gbps) 0.15 12.5 10 8 10 25
Bandwidth (GHz) 1 >25 >20 20 25 >50
Area (mm
2
) 0.18 — 1.8mm
long
0.18 0.11* <0.003
CMOS Process 0.13µm SOI — 90nm 40nm 65nm
*: With oscillator embedded.
with high energy efficiency. Continuous scaling of CMOS technology has en-
couraged it as a potential mm-wave and THz implementations [52], and with
great integration possibilities. This high frequency enables the use of a high
ava ilable bandwidth and data rate, with limited system complexity. However,
the high operation frequency also leads to a degra de d performance of the MOS
transistors , making the design extremely challenging.
Recent researches have demonstrated multi-channel I/O data links [307]
leveraging much larger bandwidth utilization with achievement of a high data
rate (∼10 Gbps) compared to one channel serial link with power-consuming
MUX/DEMUX. However, the CMOS top metals used in fine-pitch silicon in-
terconnects are typically narrow and thin, leading to high channel loss with
strong crosstalk among channels especially at high frequencies. Spec ial equal-
ization techniques such a s the de cision feedback equalizer (DFE) must be
CMOS THz Wireline Communication 319
140G Source
Multi Channel
in parallel
Crosstalk
between
channels
Lossy
Channels
Rx
(Direct Conversion)
Tx
(ASK Modulation)
1.2V
Modulator
OOK
Data In
0
0 0
0
1
1
1 1
Mixer
BB Amp
1.2V
Modulator
OOK
Data In
1
0
0
0
1
1
1
1
Mixer
BB Amp
1
1
0 0
Rx
Coupler
Rx
Coupler
Tx
Coupler
Tx
Coupler
Figure 14.13: (a) The insertion loss (isolation) at on (off) state of
the proposed modulator and the resulting extinction ratio, (b) the
transient waveform of the modulated signal after the proposed mod-
ulator.
incorporated into the receiving side to compensate the induced inter-symbol
interference (ISI) with large power overhead. Simultaneous bi-directional multi
(Base+RF)-band signaling [2 84] is also demo nstrated for high data rate trans-
mission between controller and DRAM. However, to fulfill certain BER re-
quirements, the data rate will be ultimately limited by the low extinction
ratio of on-chip modulator as well as high channel lo ss. In s um, exc iting I/O
designs have faced g reat challenges due to the poor channel bandwidth along
with the low extinction ra tio of active modulator.
This work explores the realization of bi-directional multi-channel I/O by
novel SPP interconnect (coupler and channels) and SRR-based modulator,
to achieve a high data rate with high energy efficiency. The 140GHz I/O
transceiver ar chitecture is shown in Figure 14.13, which accommoda tes mul-
tiple RF TRx links. The SPP T-line is a kind of plasmonic metamaterial
consisting of a metal strip with thin film thickness, in which a 1D periodical
array of grooves is drilled. As such, the propagation of surface-confined mode
is adapted to the curvature of the surface. Therefore, the resulting crosstalk
between the two back-to-back placed SPP T-lines (channels) will be signif-
icantly attenuated, while the two face-to-face placed SPP T-lines (coupler)
has str ong wide-band coupling between their respective grooves. In additio n,
320 Design of CMOS Millimeter-Wave and Terahertz Integrated Circuits
To SPP
Channel
SRR
Modulator
0
1 1
1
0
(a)
M1
M2
M3
M4
Vb
M5
M6
Transmitter
Ask Data
Pattern
0.0 0.5 1.0 1.5 2.0 2.5 3.0
0.0
0.2
0.4
0.6
0.8
1.0
1.2
Amplitude [V]
Time [ns]
0.0 0.5 1.0 1.5 2.0 2.5 3.0
-0.4
-0.2
0.0
0.2
0.4
Amplitude [V]
Time [ns]
VDD
BB
Amp
Vout
(b)
Receiver
Vout
VDD
V+
V-
Mixer
From SPP
Channel
V+
V-
VL
0.0 0.5 1.0 1.5 2.0 2.5 3.0
-0.06
-0.04
-0.02
0.00
0.02
0.04
0.06
Amplitude [V]
Time [ns]
0.0 0.5 1.0 1.5 2.0 2.5 3.0
-0.6
-0.5
-0.4
-0.3
-0.2
-0.1
0.0
0.1
Differential Amplitude [V]
Time [ns]
Figure 14.14: (a) The insertion loss (isolation) at on (off) state of
the proposed modulator and the resulting extinction ratio, (b) the
transient waveform of the modulated signal after the proposed mod-
ulator.
CMOS THz Wireline Communication 321
(a)
(b)
Figure 14.15: The eye-diagrams of 25Gb/s data rate communication
for two I/O transceivers. (a) one is with proposed SPP T-line based
channels as well as SPP coupler, and (b) the other one is with con-
ventional T-line channels along with T-line coupler.
the proposed modulator evolves from a stacked SRR struc ture with MOS
switches connected to the inner ring of SRR unit-c ells. The carrier signal will
be strongly rejected at the normal resonation region when the data bit is
low with MOS switches turned off, while it can modulate the data with low
loss when the resonation is shifted to other fre quencies. As such, with strong
crosstalk reduction of the channel, high coupling factor of the coupler, and
high extinction ratio of the modulator , the IO transceiver is designed with
higher than 20Gbps data communication.
The multi-channel bi-directional I/O transceiver architecture is presented
in Figure 14.13. Such an I/O architecture accommodates a large number of
peer-to-peer on-chip high-speed interconnects with ca pabilities of multi-drop
arbitration, to mee t the require ment of future network-on-chip (NoC). At
each side only either Tx or Rx can work at a time. The non-working block
will be shut down to save power. With strong crosstalk reduction by the SPP
channels, the ISI neutralization equalize rs are not necessary at the receiving
side, saving considerable power with more design margin to further increase
the data rate. In contrast to conventional I/O de sign, since the modulator is no
longer constrains the data rate at the tra nsmitter s ide , the Rx can be designed
with wider bandwidth by re moving the low-noise amplifier (LNA). Note that
at mm-wave or THz, the wide-band LNA features a casc ading o f multiple
amplification stag es, which is not a rea efficient but consumes high DC power.
Instead, to maintain a high SNR for one channel, high power/efficient THz
source [52] can be rea dily utilized as a global clock for transmission. Due to the
non-coherent nature of ASK modulation, the clock synthesizer is not necessary,
and the wide-band self-mixing mixer can be employed to demodulate the data
buffered by low-power baseband amplifiers. In this design, the SPP channel
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