Antenna 201
with
R
tl
=
L
S
(2W −
√
2L
S
)
√
2W L
S
R
tw
=
L
S
(2L−
√
2L
S
)
√
2LL
S
. (8.7)
With (8.5), (8.6) and (8.7), L
eff
and W
eff
can be simplified as:
L
eff
= L + 1.042L
s
−
1.737L
2
s
W
W
eff
= W + 1.042L
s
−
1.737L
2
s
L
. (8.8)
As observed fro m (8.8), both the effective width and length are extended
by a factor of L
eff
/L or W
eff
/W after introducing corner slots, which means
the antenna size can be re duced by the same ratio at a particular frequency.
However, the reduction radio is als o limited by higher-order effects. As shown
in (8.8), L
eff
and W
eff
reach their maximums of 1.15L and 1.15W when
L
s
= 0.3W a nd 0.3L, respectively, which is equivalent to a 15% size reduction
in each dimension of SIW antenna.
Note that the lengths of center slots L1 and W 1 can be calculated by:
(
L1 =
1
2f
L1
√
µ
eff
ε
eff
W 1 =
1
2f
W 1
√
µ
eff
ε
eff
(8.9)
where f
L1
and f
W 1
are the resona nt frequencies of center slots, µ
eff
and ε
eff
are the e quivalent permeability and pe rmittivity in the center slots, respec-
tively. In a conventional SIW antenna design [233], to maximize radiation
efficiency, both center slots need to have the same resona nt frequencies as the
respective r esonance mode: f
L1
= f
120
and f
W 1
= f
210
. By properly adjusting
the cavity dimensions, f
120
and f
210
can be close to each other so tha t a cir-
cularly polarized radiation is generated at a frequency in between. However,
the antenna designed in such method has a narrow bandwidth, because only
two resonance modes exist. In this work, the radiation bandwidth is extended
by introducing additio nal resona nc e modes in the antenna design, whe re four
resonance modes are generated by designing f
L1
and f
W 1
slightly lower and
higher than f
120
and f
210
, respectively. Mor eover, the antenna perfo rmance
is further impr oved from the following two aspects. Firstly, the radiation effi-
ciency is increased with the cavity heig ht, which could be achieved by selecting
a CMO S process option with a large number of sta cking layers. Secondly, the
metal loss of SIW walls is largely reduced by replacing metal vias with metal
bars. Note that vertical co nnection by metal bars is an option provided in the
standard CMOS process to connect many vias horizontally (Figure 8.3) if the
metal density is not critical in the particular area.