Phase-Locked Loop 137
6.2 60-GHz PLL Design
The propos ed new inductive tuning in Chapter 4 is utilized for VCO design
in the 60-GHz PLL. To achieve a wide FTR with maintained phase noise
performance, the VCO prototype presented in Section 4.4.3 with symmetric
inductive tuning is selected.
Various frequency dividers have been explored for different applications.
Generally, frequency dividers can be classified into digital and analog classes.
The digital class of dividers c an be s ub-divided into current-mode logic (CML)
dividers [180] and dynamic divider [181]; and the analog class of divider s can be
sub-divided into Miller dividers [182] and injection-locked frequency dividers
(ILFD) [183, 184, 185]. Dynamic dividers are ea sy to design that operate at
low frequency with wide range and variable division-ratio. CML and Miller di-
viders can operate at higher operating frequency with wide locking range, but
usually suffer from high power consumption. Compared with Miller frequency
dividers and CML dividers, ILFD can achieve hig he r operating frequency with
lower power consumption. Its major limitation, however, is the limited locking
range.
In the de sign of the divider chain in 60-GHz PLL, accor ding to different
operating frequencies, the choice o f the divider structure in each dividing stage
will be different. The first stage divider opera tes at the highest fre quency in the
divider chain, and thus the ILFD is usually employed. The last stage divider
operates at the lowest frequency in the chain, and thus a dynamic divider is
usually employed due to the simple str uc ture and va riable division-ra tio. The
remaining sta ges can be designed with CML and Miller dividers for their wide
locking range. The major challenge is to design the first stag e divider with a
wide locking range to cover the wide freque nc y range at 60 GHz. To increase
the locking r ange of the ILFD, varactors are usually deployed to tune the self-
oscillation frequency of ILFD. However, a large varactor will severely degrade
the phase noise of ILFD and PLL . Capacitor banks can b e used to realize
multi-band operation [183]. Howe ver, as frequency scales up to 60-GHz, the
large parasitic capacitance from the capacitor bank becomes too large and the
quality factor of capac itor decrea ses significantly [145, 186].
As introduced in Chapter 4, inductive tuning has recently become a
promising substitute to replace the capacitive tuning, and is used in 60-GHz
VCO design to realize a wide FTR. Besides a wide FTR, inductive tuning can
also pr ovide the benefit of isolated DC noise from the tuning element. The
same mechanism could be used in high-frequency divider design to realize a
large locking range. In this section, an inductor-loaded transformer is intro-
duced into the conventional ILFD structure to improve its locking range by
creating multiple frequency bands.
The locking range (LR) for an injectio n locke d oscillator is given by [184]
LR =
1
2Q
·
I
inj
I
osc
·
1
r
1 −
I
2
inj
I
2
osc
(6.1)
138 Design of CMOS Millimeter-Wave and Terahertz Integrated Circuits
where I
osc
, I
inj
and t are the oscillator and injection curre nt and quality
factor of the LC-tank, respectively. Thus, for larger LR, the quality factor of
the LC-tank should be balanced. The second important consideration of LR is
on the effective injection current (I
inj
) reaching the oscillator core. To enhance
the LR, the internal injection power while using the same external injection
should be maximized. The input signal can be injected at the tail- node or
direct across the LC-tank [187]. Due to the loss of injection power in the
parasitic capacitance of the tail-node injection, direct injection is employed to
improve the injection efficiency in this work.
The introduced switching inductor loade d transformer in Chapter 4 is uti-
lized here for the 60-GHz divider design, where one new type of ILFD is
proposed in this section. As shown in Figure 6.3, the input injection tran-
sistor is placed across the LC-tank. The c ross-coupled transistors generate
negative Solid-State C ircuits and resistance to compensate the energy loss in
the LC-tank. The injection locking will oc cur when the self-oscillation fre-
quency of the ILFD is close to the half of the input signal. The switching
inductor loaded transformer can change the inductance of the LC-tank, and
then finally change the self-oscillation frequency, which leads to multi-band
operation for a wide locking range.
Figure 6.3: Schematic of switch-inductor loaded transformer-based
ILFD.
Phase-Locked Loop 139
Figure 6 .4: Schematic of the 30-GHz ILFD.
Figure 6 .5: Schematic of the 60-GHz divider chain.
In addition to the divide-by-2 operation, a nother two divide-by-2 dividers
are implemented at a lower frequency region to realize a divide-by-8 divider
chain. The second stage divider is implemented with Miller divider topology
[182] as shown in Figure 6.4. Transistors M3 and M4 are designed with smaller
size than M1 and M2 to lower the Q-factor in LC tank, thus increasing the
locking range. M5 and M6 are dummy transistors to provide a balanced match-
ing condition for differential inputs. The third sta ge divider is implemented
with a common CML topology. Figure 6.5 shows the schematic for the whole
60-GHz divider chain.
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