282 Design of CMOS Millimeter-Wave and Terahertz Integrated Circuits
(a)
(b)
Figure 12.22: Post-layout simulation results. (a) the conversion gain
and output phase mismatch of the 280-GHz differential mixer; (b)
the conversion gain and NF of the 280-GHz receiver with differential
mixer and VGA from [14].
the frequency LO signal. An averaged conversion gain of -4 .6 dB is obse rved
at 280GHz for V P
IF
and V N
IF
, which have magnitude and phase mismatch
of 0.2 dB and -0.7 degrees, respectively. Note that the phase mismatch has
already been normalized to 180 degrees.
CMOS THz Imaging 283
Figure 1 2.23: 2D LWA array with 2×13 unit cells.
12.4.1.2 Variable Gain Amplifier
In this work, a modified Cherry–Hooper amplifier-based VGA [14] is employed
to boost the power of IF signals from mixer outputs with low power consump-
tion, compact design size as well as large gain c ontrol ra nge. Figure 12.22(b)
shows the post-layout simulation results of the entire rec eiving part after in-
tegrating mixer and VGA under the following conditions: the power of the
LO signal is fixed at 0 dBm; the frequency of RF signal is 1GHz above the
frequency LO signal. The gain and noise figure (NF) observed at 280GHz is
46.6 dB and 24.6 dB, respectively. And the variations of gain and NF are both
less than 2dB in 272 ∼ 302 GHz. The 3dB IF bandwidth is 1.1 GHz, which is
mainly determined by VGA [14].
12.4.2 2D On-Chip Leaky Wave Antenna Array
A 2D antenna array with on-chip LWA with 2 × 13 CRLH T-line unit-cells
is designed in the 65-nm CMOS process as shown in Figure 12.23. Two 1D
CRLH T-line-based LWAs introduced in Sec. 8.2 are connected in parallel by a
T-junction to further increase the broadside antenna gain as well as reduce the
end-fire leakage. The antenna input is matched to the system character istic
impedance of 76 Ω by connecting a coplanar waveguide (CPW) with a leng th
of 80 µm, which is implemented in laye r M8. A standard high-resistivity silicon
layer (1000 × 300 µm
2
) with a thickness of 100 µm is also pla ced on top of
the antenna surface to enhance the radiation efficiency of antenna array.
The proposed 2D LWA array is verified by a full wave simulation in Ansoft
HFSS. Figure 12.24(a) s hows the simulated radiation pattern at 280 GHz. It
has a br oadside radiation pattern with a directivity of 9.1 dBi and a radiatio n
284 Design of CMOS Millimeter-Wave and Terahertz Integrated Circuits
(a)
(b)
Figure 12.24: HFSS s imul ated radiation pattern of the 2D LWA array
at 280 GHz in (a) 3D plot, and (b) polar plots in ZOX and ZOY
planes.
CMOS THz Imaging 285
Figure 12.25: Simulated antenna input S11 and gain at b roadside
direction (Z-axis).
efficiency of 41%. As a re sult, the half-power bandwidth (HPBW) is ±20
degrees in the ZOX plane as illustrated in Fig ure 12.24(b); and a broads ide
radiation gain of 5 dBi (in Z direction) as well as an end-fire leakage of -16
dBi (in X directio n) are obtained. Compared to the 1 D LWA demonstrated
in Sec. 8.2, 2D LWA has 0.9 dB higher gain at 280 GHz. This improvement
is lower than the ideal value of 3dB bec ause of the additional loss introduced
by the ma tching network as well as the T-junction. Figure 12.25 shows the
simulation results of input S11 as well as the wide-band antenna g ain on the
broadside direction. The S11 is observed to be smaller than -6 dB from 256
GHz to 310 GHz; a 47-GHz 3- dB bandwidth centered at 279 GHz is observed
from 255 GHz to 302 GHz.
12.4.3 Transceiver Integration
The proposed 280-GHz CMOS transceiver design is implemented in the 65-nm
CMOS RF process with the Cadence layout shown in Figure 12.26. It has a
total area of 1000 × 10 10 µm
2
. Note tha t there are no measurements for the
proposed 280-GHz transceiver, and the p erformance of transceiver is verified
by post-layout and EM simulation. Operating from a 1.2-V power supply, the
whole transceiver consumes 298.6 mW, including 3.5 mW contributed by the
280 GHz differential mixer and VGA.
The performance of the proposed THz source is s umma rized in Table 12.2
with comparison to the recent sta te-of-the-art THz transmitters and receivers
286 Design of CMOS Millimeter-Wave and Terahertz Integrated Circuits
Table 12.2: Perfo rmance Comparison with Recently Publ ished THz Transmitters and Re ceivers
Tra nsm itters
Parameters
Unit [31] [269] [178] This Work
Technology
— CMOS 45nm SOI CMOS 65nm C MOS 65nm CMOS 65nm
Center Frequency
GHz 280 260 288 286
P
OUT
dBm/Pixel -7.2 0.5 -4.1 1 .3
Broadside P
EIRP
dBm 9.4 15.7 14.2 6.3
FTR
% 3.2 9.5 1.7 10.5
DC Power
mW/Pixel 52.25 800 275 295.6
Power E fficiency
% 0.37 0.14 0.14 0.46
Transmitter Size
∗
(A
T X
)
mm
2
2.7×2.7 78.5 12.56 1×1.01
P
EIRP
/A
T X
mw/mm
2
1.19 0.47 2.09 4.27
Receivers
Parameters
Unit [230] [268] Receiver in Sec. 12.3 This Work
Technology
— CMOS 0.13µm CMO S 65nm CMOS 65nm CMOS 65nm
Center Frequency
GHz 280 201 260 286
Detection Method
— Diode-detection Super-
regenerative
Heterodyne with
Single-ended output
Heterodyne
with Differential
output
Gain
dBi 31 — -2 54
NF
dB — - 38.6 25
System Bandwidth
GHz 700 1.5 42 30
Resolution Bandwidth
GHz 700 1.5 0.1 1.1
DC Power
mW/Pixel 0.1 18.2 6.6 3.5
Receiver Size
mm
2
3.8 0.45 0.99 1.01
∗
The area of silicon lens is included in the transmitter size calculation.
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