8.7. Voltage Gains Including Transistor Output Resistance

In Project 9 we measure the gain of a “balanced” stage with drain resistors for both transistors. The amplifier is the PMOS version of the NMOS amplifier of Fig. 8.2. We obtain an exact Level 1 SPICE solution for the gains for both outputs. The example is used to explore the use of a simulator for obtaining precision results to compare with simple hand calculations.

For larger λ_n values (NMOS), the output resistance can influence the gain and complicate the gain expressions considerably. Here we consider the effect due to g_ds1 and g_ds2 while retaining the effect of R_bias. In the following, the gain of the inverting input, a_v1, is obtained again as a common-source stage with source resistance. The effect of g_ds2 on the effective source resistance is included (input at the source of M₂). The effects due to g_ds1 are also taken into consideration.

The gain of the noninverting case, a_v2, is obtained by considering the cascade of the source follower stage (M₁) and the common-gate stage (M₂), as, in effect, was done in the development of (8.19). The source-follower gain takes into account effects from g_ds1 and g_ds2, and the gain of the common-gate stage depends on g_ds2.

8.7.1. Gain of the Common-Source Stage with Transistor Output Conductance and Source Resistor

The circuit transconductance for a common-source stage with source resistor, with the inclusion of g_ds, was developed in Unit 4 [(4.18)]. This will be reviewed and reinforced here in the form of a slightly different approach to the result. The signal circuit for this case is again given in Fig. 8.4. Using the variables of Fig. 8.4, the circuit transconductance is G_m1 = I_d1/V_i. The object is thus to obtain a relation between these two variables.

The fraction of the current produced by the intrinsic transistor, g_m1V_gs1, which flows into R_s is

Equation 8.28

This is the portion of current source g_m1V_gs1, shared between 1/g_ds and R_D + R_s, which flows through R_D + R_s, that is, I_d1. Note that R_D + R_s and 1/g_ds1 are in parallel and shunt the transistor current source.

A relation for V_gs1 in terms of I_d1 follows, which is

Equation 8.29

The input Voltage is the sum of V_gs1 and the drop across R_s. That is,

Equation 8.30

Using (8.29) in (8.30) gives

Equation 8.31

or

Equation 8.32

The circuit transconductance follows as

Equation 8.33

The gain for this case is then

Equation 8.34

A discussion of R_s as affected by g_ds2 follows.

8.7.2. Common-Gate Amplifier Stage

The circuit diagram of Fig. 8.5 is for the M₂ portion of the differential amplifier. The input is applied at the source, V_s2, and the output is taken at the drain, V_d2 = V_o2, while the gate is grounded. This is a common-gate configuration. Here we analyze the input resistance, for evaluating the effect on R_s, and gain of the common-gate stage.

Without g_ds2, the input resistance at the source is just 1/g_m2. With g_ds2 in place, there is a positive feedback from the drain output to the source input. This causes the input resistance to increase. With g_ds2, the current into the source terminal is

Equation 8.35

It is noted that the g_ds2 term reduces the input current, which has the effect of increasing the input resistance. From (8.35), the resulting input resistance at the source, R_is2 = V_s2/I_d2, is

Equation 8.36

The input resistance goes to 1/g_m2, as noted above, for g_ds2 = 0. The expression for the equivalent R_s is now R_s = R_bias || R_is2, where R_is2 is (8.36). In modern integrated circuits, R_D2 may be replaced with a high-resistance transistor current source, and the input resistance is this case can be much greater than 1/g_m2.

The gain of the common-gate stage is obtained as follows: The output voltage is

Equation 8.37

which gives

Equation 8.38

Note that for g_ds2 = 0, the gain has the same magnitude as the simple case for the common-source stage.

8.7.3. Voltage Gain for the Noninverting Output

The noninverting amplifier gain is based on a cascade of a source-follower stage (M₁) and a common-gate stage (M₂). The source-follower transconductance, I_d1/V_i, is (8.33). Using this with V_s1 = I_d1R_s gives

Equation 8.39

Note that the magnitude is about ½. Overall gain is the product of (8.38) and (8.39), which is

Equation 8.40

The equations from this unit are summarized below in Unit 8.11.

Recall from the discussion of MOSFET model parameters that g_ds is given by (4.13), which is

Thus, the gain expression depends on parameter λ, and especially if λ is somewhat large. In Project 9 we measure the gains from the two drains and use the results to find the value of λ that makes the theory fit the measurements. In this way, we are getting a signal-derived experimental number to compare with that obtained in the parameter-determination project. This will be done using the PMOS configuration since the value of λ_p is large and the effect is significant. All of the gain expressions, which are based on NMOS transistors, apply exactly to the PMOS stage with substitution of subscripts; change n to p (parameters) and reverse the order for dc voltage variables.

For hand calculations, approximate forms must reasonably be used. This applies to approximate forms for device parameters and gain. The basic gain equations are, again, assuming that g_ds = 0 and R_bias = ∞, simply, as given by (8.15) and (8.17),

with R_D1 = R_D2 and g_m1 = g_m2. In the differential amplifier project, we will compare these with the more precision forms.