P10.4. Evaluation of the Bias Setup

Procedure

SetVoID.vi sends out the gate voltage of the driver transistor (M1, NMOS) and then sweeps Chan1_out to set the output bias voltage (Chan1_in) at VDD/2. This VI is a subVI in the gain measurement VI (below, next part). To run this VI as a top VI, set the Index to zero. Set Chan0_out Initial to 0V.

  • Run SetVoID.vi while adjusting VGS for the lowest value of the ID range of about 50 μA. Verify that the bias-setting circuit functions properly. Adjust the Control-Loop Constant to obtain a final dc value convergence rate similar to that in the example. Default and save the Front Panel.


..................Content has been hidden....................

You can't read the all page of ebook, please click here login for view all page.
Reset
3.15.174.76