AmpGain.vi sweeps the signal frequency over the range finit<fs<1000 Hz. Note that on the low end of the sweep, this is a fairly slow process. The functiongenerator VI sends several cycles at each frequency, which is, e.g., 1 sec/ cycle at fs = 1 Hz. The amplifier voltage gain is calculated at each frequency step. This is the signal output voltage, Vo, divided by the signal input voltage, Vs. Vs is corrected for digital-to-analog error. The correction is performed by subVI, DAC.vi.
The first measurement is made without Cb. Enter the value of RBn in the Front Panel of AmpGain.vi. Although it is defaulted in SetVCE2.vi, it is needed in the Top VI in the calculation of avb. Also open subVI’s SetIC.vi and FG1Chan.vi to observe the program in progress. At least temporarily open SetVCE2.vi to verity that the component values in the Front Panel are correct and have been made the default values.
Set Freq(init) to 10 Hz in the Front Panel of AmpGain.vi. Verify that VCC(init) and VBB(init) are set to 10 V. Run the VI. Upon completion of the execution there should be a low-frequency plateau in the response curve. The VI uses the maximum in the plot for the amplifier (circuit) gain. The roll-off at high frequencies is due to circuit board and transistor capacitance. Note that the example is with the capacitor in place. There will be no low-frequency roll-off without the capacitor.
Now reset VCC(init) and VBB(init) to match the values in the Digital Indicators (in lieu of 10 V as in the example). The dc set up will be considerably faster. Re-run AmpGain.vi to verify that it functions properly.
If the gain curve appears already to be in the high-frequency roll-off at the lowest frequencies, re-run the VI with Freq(init) set to 1 Hz.
Re-run the VI and adjust X (downward for increasing Vs) to obtain a Vo (signal sine-wave peak) of about 1 V or about one-third of VCE (operating point). Note that the DAQ limit must be set at 10 V to accommodate the dc + signal measured with Chan0_out. Therefore, the output signal voltage must be relatively large to have sufficient measurement resolution. Log the Front Panel.
Add the capacitor, Cb, to Circuit C6. Set Freq(init) to 1 Hz. Run AmpGain.vi. If a proper selection of Cb was made, the response curve should have a flat portion as in the example. The flat segment contains the gain value. Note that if f3dBlo indicates 1 Hz, then it is less than 1 Hz. In this case, lower Freq(init) to obtain a curve that includes the f3dB frequency. It may be necessary to increase X (decrease Vs) for a satisfactory value of Vo, as the gain is higher with the capacitor. Log the Front Panel when a satisfactory result has been obtained.
