11.3. Operational Amplifier Offset

Ideally, an opamp is balanced such that the dc output is zero (with dual power supply) with zero input voltage (as in Fig. 11.1). In practice, this is not realized, due to the variation of parameters between similar transistors and components. As mentioned above, the opamp configuration of Fig. 11.1 will probably be locked at near the positive or negative rail voltage. Thus, a given opamp requires an input voltage V_in to set the output to zero. The magnitude of this voltage is defined as offset voltage V_off.

An equivalent circuit that includes the offset voltage is given in Fig. 11.6. The imperfections of the amplifier are reflected into the offset voltage and the opamp is ideal. If V_i is made equal to V_off, the output V_O will be zero. Suppose that V_i = 0. In this case we have the equivalent of V_off applied to the input and the output is driven toward the plus or minus power-supply voltages (depending on the polarity of V_off). V_off is usually large enough to cause the amplifier to be driven out of the active mode. For example, a typical V_off is V_off = 1 mV. Thus, if a_vo = 40,000, the output will attempt to become –40 V, which is probably greater than the supply voltage value; the output is set at the negative limit. In our project opamp, this will be roughly V_SS + 50 mV if driven negative or V_DD –1V if driven toward the positive supply.