B.1. Fundamentals of Bipolar Junction Transistor Action

A bipolar junction transistor is made up of a sandwich of two semiconductor pn junctions. Transistors are either npn or pnp. In the active-mode transistor state, one junction, the input junction, is forward biased, and the opposite junction, the output junction, is reverse biased. The behavior of the individual pn junction diode will first be considered to clarify forward and reverse bias.

A semiconductor pn-junction diode in diagrammatic form is shown in Fig. B.1. The current and voltage of an ideal pn-junction diode are related by

Equation B.1

where V_D is the voltage applied between the p and n regions (positive at the p terminal), I_D is the responding current, and I_Sd is the saturation current. The thermal voltage, V_T, is defined as V_T = kT/q, where T is the temperature, k is the Boltzmann constant and q is the electron charge. At 27°C, V_T ≈ 26 mV. V_D is positive for forward bias and negative for reverse bias.

As illustrated by the arrows in the junction of Fig. B.1, for forward bias, the diode current consists of injection of holes from the p region (positive free carriers) into the n region and injection of electrons from the n region (negative free carriers) into the p region. The exponential factor in (B.1) is associated with the statistics of the free carriers, holes and electrons, and the effect on the lowering of the barrier to free-carrier flow of the application of the positive applied voltage.

The magnitude of I_Sd is dependent on semiconductor electronic properties such as doping levels and free-carrier lifetime and mobility. The magnitude of current flow for a given V_D is dictated by a combination of the barrier-lowering factor (in the exponential) and the rate of free-carrier recombination; that is, carriers are annihilated by recombining with the opposite type of carrier on the opposite side of the junction from which they are injected.

A typical value for saturation current, I_Sd, is 10^–11 mA, such that, for example, for V_D = 0.6 V, I_D ≈ 0.1 mA and increases by an order of magnitude for each additional increment of δV_D ≈ 60 mV (at room temperature). The equation would suggest that for negative V_D and |V_D| >> V_T, I_D = –I_Sd and therefore is very small compared to the current under forward bias. In real pn-junction diodes, the current is larger and is not independent of the value of the reverse applied voltage. Nonetheless, it is still very small compared to the value of current for normal forward bias.

As mentioned above, the bipolar junction transistor is made up to two junctions, which share a common region. A pnp example is shown in Fig. B.2. The individual pn junctions of a transistor also exhibit diode characteristics, and the junction currents are related to the junction voltages by equations similar to (B.1). There is an essential difference that can be explained for the case of one junction being forward biased while the other junction is zero or reverse biased. Specifically, suppose that the transistor is a pnp (the other possibility being the npn) and the pn junction on the left (input junction) is forward biased and the pn junction on the right (output junction), is made to have zero bias by connecting a wire across this junction, as shown in Fig. B.2.

Even though the forward-biased pn junction on the left shares the n region with another pn junction (on the right), it behaves like a pn-junction diode such that the current – voltage relation for the junction still has the form of (B.1) and is

Equation B.2

The saturation current is now designated I_S, since I_S ≠ I_Sd. [If the width of the n region is very large, the holes injected into the n region will recombine with electrons in the n region, and the associated current will flow entirely out through the contact to the n region. In this limiting case, the current – voltage relation for the junction on the left reverts to (B.1). The presence of the p region on the right will play no role.]

In a transistor, the n-region width is made small and the statistical chance of an injected hole surviving the transit across this region, without recombining with an electron, is very high. Upon entering the p region on the right, the holes are accommodated by the exit of an equal number of holes moving out at the contact to this p region. (Actually, they are converted to electrons at the interface of the contact and semiconductor to be consistent with having only electron flow in the metal contact and device connecting metal.)

In an ideal transistor, this is the only current mechanism. The various other current components of the real transistor are discussed below. These include electron injection that would be expected from the n region into the p region of the forward-biased junction on the left (as in Fig. B.2). In practice, special fabrication techniques are employed to make this component of current very small.

In the application of a transistor in the active mode, as for example, in an analog amplifier stage, the output junction is reverse biased, as shown in Fig. B.3. The junction configuration now represents a transistor; the regions are accordingly designated as emitter (E), base (B), and collector (C). Consistent with these assignments, the current into the transistor on the left is the emitter current, I_E, and the output current on the right is the collector current, I_C, and according to the mechanism described above for the ideal transistor, I_C = I_E.

With forward bias (voltage) across the emitter – base junction and reverse bias across the collector – base junction, the emitter – base current equation, (B.2), is slightly altered, to become

Equation B.3

Variable subscripts have been changed to reflect the fact that the pnp structure is now specifically a transistor. (The parameter I_S is the same in SPICE for the diode and the transistor models. I_Sd was used above for this discussion alone to differentiate between the two.) For reverse bias of the collector – base junction, the –1 of (B.2) is eliminated.

In this simplified version of the transistor, the output current is independent of the collector – base voltage. The possibility of infinite voltage gain is thus provided, because the output circuit behaves like a pure current source; that is, it will force current into an external resistance, which can be large without limit. This conclusion remains subject to additional alterations for the real transistor. However, in principle, the transistor mechanism as discussed is applicable short of certain limitations.

An example of obtaining gain from a transistor in an amplifier circuit is shown in Fig. B.4. A ground has been added at the n-region terminal to establish a reference. Therefore, the output voltage, V_O, is defined with respect to this reference. To the transistor circuit of Fig. B.3, we have added an input signal V_eb and a load resistor, R_L. Note that since the input and output are referred to the base, the circuit is a common-base amplifier.

Suppose that initially, V_eb = 0 and V_EB is selected to give I_C = 1 mA. This is, in an amplifier, the bias current. The output supply voltage is chosen to be V_CC = 12 V. We select R_L = 5 kΩ giving a bias output voltage V_O = I_CR_L = 5 V. Note now that the collector-base bias voltage is V_BC = V_CC – V_RL = 7V and the junction is reverse biased.

We now apply an input voltage (signal, ac, or incremental voltage) V_eb = 18 mV. This increment added to V_EB will cause I_C to double (i.e., I_C = 2 mA). The result is a new output voltage of v_O(sig) = 10 V. Thus the incremental (or signal) output voltage is δV_O = v_O(sig) – V_O = V_o = 5 V. Base – collector voltage is now v_BC = V_RL = 2 V and the junction remains in a reverse-bias state.

The incremental (ac or signal) ratio of output and input voltage is V_o/V_be = 5V/18 mV = 278. Note that the gain is power-supply limited. Employment of a larger power supply permits the use of a larger R_L, which results in a higher gain. We will later show that the gain is in fact V_RL/V_T based on an approximate linear representation between the input and output voltage. Note that in this case, the linear approximation is V_RL/V_T = 192, which indicates, for the example above, that the linear relation provides a fair estimate.

An alternative bias arrangement is shown in Fig. B.5. The input terminal is now that of the n region and the p terminal is a common node to the input and the output. This is the common-emitter configuration. Note that the voltage applied to the input junction has not changed, and the output junction now has a bias voltage of V_EC – V_EB and remains reverse biased as long as V_EC>V_EB.

In electronic amplifiers, all three terminal configurations are possible: common base, common emitter, and common collector (emitter follower). Themost frequently employed amplifier stage is based on the common-emitter mode, but the other two serve important roles in electronic amplifiers. In all three, the emitter – base voltage is the input control-terminal voltage. In the common-emitter and common-base, the output current is the collector current and in the common collector, it is the emitter current. The common-collector configuration is usually referred to as the emitter follower.

In the subunits that follow, the detailed SPICE relations that generally relate the branch currents to the terminal voltages are developed. This includes the addition of many aspects of the real transistor which were not included in the discussion above of the highly idealized transistor.

Initially, the forward-active mode is explored, and this is followed by a discussion of the reverse-active mode. The reverse-active mode is where the situation in Fig. B.3 is reversed. Thus, V_CB is positive (base – collector junction forward biased), while V_EB is zero or negative. In the reverse-active mode, V_CB becomes the input voltage, and the output current is the emitter current, I_E.

Although the transistor is not operated in the reverse-active mode, the relationships developed for this case can be combined with those from the forward-active mode. The combination produces the general equations for relating currents and terminal voltages in transistors for all bias possibilities (i.e., where the transistor is biased out of the active mode).