C.7. Common-Emitter Amplifier with Active Load

In the early days of electronic amplifiers, the voltage amplification device was, of course, the vacuum tube. It existed in only one polarity configuration, that is, with positive plate (bus or rail) voltage. With the appearance of semiconductor transistors came the availability of the dual set of devices with opposite terminal voltage polarities. This is the case for BJTs, JFETs, and MOSFETs. (Vacuum tubes were implemented in class B amplifiers. The application required a pair of inputs, one 180° out of phase with the other, normally derived from a transformer.)

The dual set has provided the versatility for a wide range of electronic system applications, including the amplifier with active load shown in Fig. C.8. This can be compared with the circuit of Fig. C.1, which in place of the pnp transistor, has a bias collector resistor, R_C.

Note that either transistor base could serve as the input such that the opposite transistor becomes the load. In Fig. C.8, the npn is chosen as the driver transistor and the pnp as the load transistor.

A dc output characteristic plot is shown in Fig. C.9. Since the collector current of the individual transistors is the same, the solution to bias voltage V_CE for the npn is the intersection of the two curves, that is, 5 V. This would be a good choice for a bias output voltage for the power supply voltage of this case, which is 10 V. For the plots, V_AFn = 100 V and V_AFp = 20 V were used. (In the discussion of the npn – pnp amplifier, the added subscript n or p will denote npn or pnp, respectively.)

A signal impressed at the base of the npn causes the npn curve to move up or down while the pnp curve remains in place. Note that the pnp acts like a load line of a resistive load; however, an extension of the active-region characteristic of the pnp intersects the zero-current axis at V_CC + V_AFp = 30 V. The pnp active-load transistor thus provides the equivalent of a bias resistor with a power supply of 30 V instead of the actual 10 V.

C.7.1. Gain of the NPN – PNP Common-Emitter Amplifier with Active Load

The gain benefit for the case of the active load is apparent from the following. The equation for the gain of the BJT common-emitter amplifier with resistor R_C, which includes the output resistance of the driver transistor (in this case, npn), is a form of (C.28)

Equation C.38

where r_on is the output resistance of the npn and is given by [generalization of (C.13)]

Equation C.39

where V_CE and V_BE are the transistor bias voltage variables and I_C is the collect bias current of the amplifier. Parameters V_AFn and V_AFp are used in this unit for the slope parameter for the npn and pnp, respectively.

The output resistance expression is generalized here to emphasize that strictly speaking, the collector currents and voltages must match as suggested in the expression. Voltages V_BE and V_CE are bias values. In the following, as is standard in electronics circuit analysis, we approximate the output resistance, for example, for the npn as follows:

Equation C.40

It follows that for the pnp

Equation C.41

where I_C ≡ I_C(V_CE), that is, the actual bias collector current.

For the pnp active load, the resistor R_C is now replaced with the output resistance of the pnp, to obtain

Equation C.42

where the far right-hand side uses g_m = I_C/V_T.

The gains for the resistive load and active load cases can readily be compared with the substitution of g_m = I_C/V_T in (C.38) (gain with load R_C) and (C.40) for r_on to obtain

Equation C.43

For the example of V_CC = 10 V and bias V_CE = 5 V, V_Rc = 5 V. Using V_AFn = 100 V and V_AFp = 20 V, the room-temperature gain magnitudes are |a_vbRc| = 4.76 V/0.026 V=183 for the amplifier with R_c load compared to an npn – pnp amplifier gain magnitude of |a_vb| = 16.7 V/0.026 V=641. In practice, the advantage will be considerably more, as the value for V_AFp used here is smaller than normal for BJTs. The small number was used above in the plot (Fig. C.9) to exaggerate the effect of the slope.

C.7.2. Output Resistance at the Collector with an Emitter Resistor

In Project C2 the effect of an emitter resistor in the emitter branch of the pnp, R_Ep, on the output resistance of the pnp will be explored. The circuit is shown in Fig. C.10. The effect of the emitter resistor is to increase the output resistance, due to the negative feedback effect, at the collector of the pnp. This increase can be made to be substantial; in fact, to a good approximation, the load on the amplifier is only r_on of the npn.

The generalized gain expression, which includes the effect of the emitter resistor, is

Equation C.44

where R_op is the output resistance at the collector of pnp, for the circuit with R_Ep.

Here, we develop an expression for the output resistance of a BJT with the emitter resistor. This is a function of both R_Ep and R_Bp. In the Project C2 the amplifier gain is measured with and without a base shunt capacitor, C_b. With the capacitor in place, the base resistance in the signal circuit is effectively zero, and this alters R_op significantly. The linear circuit for the general case of a BJT common-emitter amplifier with emitter resistor is shown in Fig. C.11. The circuit includes a base resistor, R_B.

A test voltage, V_o, is applied at the collector with the base resistor and emitter resistor at signal ground. In response, a current I_o flows from V_o through R_E in parallel with R_B + r_π. This induces a voltage V_RE = (I_o – I_b)R_E across R_E that is applied to r_π in series with R_B. Base current I_b is a fraction of I_o as given by

Equation C.45

Applied voltage V_o sums up to

Equation C.46

The approximation is based on r_o >> R_E and is consistent with the fact that the signal voltage drop across the output of the transistor is much greater than across the emitter resistor.

Eliminating I_b in (C.46) using (C.45) results in the solution for R_o, which is

Equation C.47

The result has two limiting forms based on the relative value of R_B: When R_B >> r_π + R_E,

Equation C.48

The approximate form uses I_C ≈ I_E.

Intuitively, for R_B → ∞, the feedback current, g_mI_br_π, goes to zero.

For R_B→0,

Equation C.49

The alternative forms on the right in (C.48) and (C.49) use (C.15), β_ac = g_mr_π. Again, the approximate form uses I_C ≈ I_E. Note that the solution corresponds to the maximum fraction of I_o that can flow through r_π(R_B = 0), to induce a feedback current.

When applied specifically to the npn – pnp circuit of Fig. C.10, the limiting case is, for R_Bp zero,

Equation C.50

where R_op is the signal resistance looking up into the collector of the pnp. For example, if R_Ep is selected to produce V_REp = 1 V and β_acp = 50, the denominator is roughly 2, such that R_op ≈ (β_acp/2)r_op. In this case, the load on the amplifier is due almost entirely to the output resistance looking into the collector of the npn (R_on = r_on), with the result that the gain is [from C.44]

Equation C.51

The other extreme is for R_Bp >> r_πp + R_Ep, where R_op ≈ r_op [(C.48)]. The gain reverts to (C.42), repeated here

The npn – pnp amplifier circuit of Fig. C.10 is used in the project on the amplifier to investigate the signal-derived magnitude of the slope parameters of npn and pnp transistors. Using a bypass capacitor at the base of the npn, as discussed below, the signal circuit will effectively have R_B = 0, and a gain measurement along with (C.51) yields V_AFn. The gain will also be measured for the circuit without the capacitor and with R_Bp >> r_πp + R_Ep (by design). For this case, (C.42) applies and the gain measurement provides information on the combination output resistance parameter, V_AFnp. Between the two measurements, values for both parameters are determined.

In the measurement circuit of the npn – pnp amplifier, the gain referred to the signal source (amplifier circuit gain) is

Equation C.52

where R_onp is the signal resistance at the output node (Fig. C.10), that is, the combined resistance looking back into the collects of the npn and pnp transistors. In general, this is

Equation C.53

With R_Bp effectively made zero with the shunting capacitor, R_onp ≈ r_on = V_AFn/I_C. Without the capacitor, R_op is obtainable from (C.47) for use in (C.53).

In the amplifier project, the circuit-gain equation (C.52) is used to convert measured gain into R_onp and then information on V_AFn and V_AFp. With the availability of these numbers, we can then calculate the gain produced by the transistor (base to collector), using (C.44).

C.7.3. DC (Bias) of the NPN – PNP Amplifier

The circuit equations for the circuit of Fig. C.10 are (collector power supply through pnp base)

Equation C.54

and (npn base)

Equation C.55

In the project on the amplifier, R_Bp is determined for a design collector current. The selection uses (C.54) with, for example, V_CC ≈ 9 V, that is, less than the maximum available from the DAQ output. Then with R_Bn = R_Bp, V_BBn will be less than V_CC by the amount of the drop across R_Ep (for example, 1 V). This makes the good assumption that β_DCn ≈ β_DCp, A LabVIEW program then sets up the circuit for the design collector current by adjusting two supply voltages (DAQ output channels).