13.1. Combining NMOS and PMOS Circuits in Cascade
The circuit of Fig. 13.1 illustrates the concept of combining NMOS circuits with PMOS circuits for enabling direct coupling of the stages. The added feature of a dual power supply is included, which provides for having the input and outputs at ground potential. One of the important advantages of this is that connecting input sources and output loads does not affect the bias.
Figure 13.1. Cascade of a differential stage and a common-source stage. No coupling capacitors or bypass capacitors are required. This is therefore a dc amplifier.
The input can be set equal to zero volts, as it is the gate of a differential amplifier stage in a dual-power-supply configuration. The output can be set equal to zero volts by selecting the drop across the bias resistor RD3 to be equal to |VSS|. This flexibility is provided by the PMOS as the output stage; it is approximately a current course with termination at the negative power supply. With VO = 0, the available output signal range is nearly equal to the magnitude of the power-supply voltage; the drain voltage of M3 can swing anywhere from near VDD down to VSS. Note that this would not be possible if the common-source stage transistor were based on an NMOS.
The output from M2 of the differential-amplifier stage is used arbitrarily. Since the common-source stage is an inverting stage, the gates of M1 and M2 are the inverting (–) and noninverting (+) inputs, respectively. A dc stabilization resistor would be connected between the output (drain of M3) and the input at the gate of M1. This type of feedback would, of course, represent an additional load on the output stage.