There is no way to disable the IA32 processor's segmentation logic. However, if all segments are described (in the GDT) as read/writable, starting at location 00000000h and as 4GB in length, segmentation is effectively eliminated.
The code segment is defined as a 32-bit code segment (the C/D bit in the segment descriptor is set to one), with a base address of 00000000h and a length of 4GB. Defining it as a 32-bit code segment has the following effects:
All memory addresses generated by the EIP register are 32-bits wide, permitting access to any location in the 4GB code segment.
All memory addresses generated by instructions for data accesses are 32-bits wide, permitting the program to access operands anywhere within the 4GB data segment.
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