Real Mode Interrupt/Exception Handling

Real Mode Interrupt Descriptor Table (IDT) Structure

In Real Mode, the Interrupt Table resides in memory starting at location zero. The power-on assertion of reset forces the following values into the IDTR (IDT register):

• Base address = 00000000h. IDT starts at location zero.

• Limit = 03FFh. IDT size is 1KB.

Each IDT entry (the IDT has a fixed length of 256 entries) contains four bytes of information (hence the length of 1KB):

• The first two bytes of the selected IDT entry are loaded into the lower part of the EIP register (i.e., into the IP register) when the related interrupt or exception occurs. The upper 16 bits of EIP is set to zero.

• The second two bytes of the selected IDT entry are loaded into the CS register.

Figure 14-1 on page 270 illustrates the structure of the IDT in Real Mode. In Real Mode, the LIDT instruction can be used to specify a different start address and length for the table, but this is not advisable in a PC-compatible environment.

Figure 14-1. Structure of Real Mode Interrupt Table

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Many PC software programs assume that the Interrupt Table starts at location zero and expect it to be there. Execution of the LIDT instruction is permitted in Real Mode so that the programmer can set up a Protected Mode IDT and set its start address in the IDTR.

Real Mode Interrupt/Exception Handling

Refer to the descriptions under the earlier headings, “Maskable Interrupt Requests” on page 253, “Software Interrupt Instructions” on page 265, and “Faults, Traps, and Aborts” on page 260.