Overview

All current implementations of the Pentium® 4 processor family include an on-die L1 Data Cache, an on-die Trace Cache (TC), and an on-die L2 ATC (Advanced Transfer Cache; i.e., the L2 Cache). Some implementations also include an on-die L3 Cache (e.g., the Pentium® 4 Extreme Edition and the Pentium® 4 Xeon MP).

This chapter provides a detailed description of the L1 Data Cache, the L2 Cache and the L3 Cache. The Trace Cache was described in “The Trace Cache” on page 919. Figure 40-1 on page 1012 shows the basic relationships of the caches to each other as well as the major characteristics of each of the caches.

Figure 40-1. The Pentium® 4 Cache Hierarchy

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