Linked Tasks
Under the following circumstances, a task is linked to the task that transferred execution to it (because the calling or interrupted task must be resumed when the called task has completed execution):
If a far CALL selects a Call Gate in the GDT or the LDT, or where the CS portion of the branch target address selects a Task Gate in the GDT or the LDT, then the calling task is suspended and a task switch occurs to the called task. In the called task the execution of the IRET instruction at the end of the called procedure (when EFlags[NT] = 1) causes a switch back to the calling task and resumption of its execution at the instruction that follows the CALL instruction (note that only the IRET instruction can cause a task switch; the RET instruction does not).
If a hardware interrupt or a software exception selects an entry in the IDT that contains a Task Gate, then the interrupted task is suspended and a task switch occurs to the task that will act as the interrupt/exception handler. In the interrupt/exception handler task, execution of the IRET instruction at the end of the handler (when EFlags[NT] = 1) causes a switch back to the interrupted task and resumption of its execution at either the offending instruction or the one that follows it.
If the execution of an INT nn or INTO instruction selects an entry in the IDT that contains a Task Gate, then the calling task is suspended and a task switch occurs to the called task. In the called task, execution of the IRET instruction at the end of the called procedure (when EFlags[NT] = 1) causes a switch back to the calling task and resumption of its execution at the instruction that follows the INT nn or the INTO.
As part of the task switch, the processor takes the following actions:
It updates the Link field in the TSS of the called task with the selector of the TSS for the task it must return to (i.e., link back to) when the called task has completed execution.
It sets EFlags[NT] = 1 upon entry to the called task.
It sets the Busy bit in the called task's TSS descriptor = 1.
When the called task has completed execution, the execution of the final instruction (IRET) causes a task switch back to the interrupted or calling task. The task switch occurs because the processor detects EFlags[NT] = 1 when the IRET is executed. The actions taken are:
EFlags[NT] is cleared to zero.
The calling task's TSS descriptor's Busy bit is cleared to zero.
The processor switches back to the calling task and resumes it (detailed in earlier sections of this chapter).
The called task may, in turn, call other tasks, or may be interrupted to another task. It may not, however, call a task that has already had the Busy bit set to one in its TSS descriptor (the fact that its Busy bit is already set indicates that the task is currently suspended and that its TSS contains the register set contents at the point at which suspension occurred). Such an attempt results in a GP exception. A task can, however, perform an interrupt return (IRET) to a task with its Busy bit = 1 (so the calling task can be resumed). There is no limit (other than memory) to the task nesting depth. Figure 11-6 on page 203 illustrates an example where task A has called task B, and task B has called task C. It's easy to see that a linked list has been created:
The Busy bit = 1 in all three of their TSS descriptors.
The EFlags[NT] bits in tasks B's and C's TSS EFlags field = 1.
The EFlags[NT] bit in task A's TSS EFlags field = 0.
The Link field in task A's TSS doesn't contain a valid link.
The Link field in task B's TSS contains the selector for task A's TSS.
The Link field in task C's TSS contains the selector for task B's TSS.
The EFlags register's NT bit = 1.
The TR contains the selector for the current task's (task C's) TSS descriptor.
