About This Book

The IA32 Architecture Specification

There is no document that is officially referred to as the IA32 Architecture Specification. Rather, it consists of the three volume set consisting of:

• IA-32 Intel® Architecture Software Developer's Manual Volume 1: Basic Architecture.

• IA-32 Intel® Architecture Software Developer's Manual Volume 2: Instruction Set Reference.

• IA-32 Intel® Architecture Software Developer's Manual Volume 3: System Programming Guide.

While the specification defines the register set, the instruction set and the software exceptions, it does not include the specific methodologies used to implement a specific processor. For example, the following design decisions are outside the scope of the specification:

• Whether or a processor design includes caches and, if so, the number of, size of, and architecture of the caches.

• Whether or not a processor design includes one or more TLBs and, if so, the number of, size of, and architecture of the TLBs.

• The type of bus that connects the processor to the system.

• The number and types of instruction execution units.

The Pentium® 4 Is the Sum of Its Ancestors

The Pentium® 4 processor embodies all of the software characteristics that were incrementally introduced over the years since the introduction of the 386 processor. This software environment evolution consists of three elements:

• The evolution of the register set.

• The evolution of the instruction set.

• The evolution of the software exceptions.

There is real value in understanding how the architecture has grown over the years.

The CD

The CD that accompanies the book contains an additional 16 chapters of material that could not be included in the book due to binding constraints. This material is provided in the form of a PDF file.

The MindShare Architecture Series

The MindShare System Architecture book series is published by Addison-Wesley and includes the publications shown in Table 1.

Cautionary Note

The reader should keep in mind that MindShare's book series often deals with rapidly evolving technologies. This being the case, it should be recognized that the book is a “snapshot” of the state of the targeted technology at the time that the book was completed. We attempt to update each book on a timely basis to reflect changes in the targeted technology, but, due to various factors (waiting for the next version of the spec to be “frozen,” the time necessary to make the changes, and the time to produce the books and get them out to the distribution channels), there will always be a delay.

The Specification Is the Final Word

As with all of our books, this book represents the author's interpretation of the specification. When in doubt, the Intel specification is the final word.

Documentation Conventions

The conventions used in this book for numeric values are defined in the sections that follow.

Hexadecimal Notation

This section defines the typographical convention used throughout this book. All hex numbers are followed by an “h.” Examples:

9A4Eh
0100h

Binary Notation

All binary numbers are followed by a “b.” Examples:

0001 0101b
01b

Decimal Notation

Numbers without any suffix are decimal. When required for clarity, decimal numbers are followed by a “d.” The following examples each represent a decimal number:

16
255
256d
128d

Bits Versus Bytes Notation

All abbreviations for “bits” use lower case. For example:

• 2.5Gb/s = 2.5 Gigabits per second.

• 2Mb = 2 Megabits.

All references to “bytes” are specified in upper case. For example:

• 10MB/s = 10 Megabytes per second.

• 2KB = 2 Kilobytes.

Other designations:

• “lsb” refers to the least-significant bit.

• “LSB” refers to the least-significant byte.

• “msb” refers to the most-significant bit.

• “MSB” refers to the most-significant byte.

Bit Fields (Logical Groups of Bits or Signals)

In many cases, bit fields are documented as [15:8], with this example referring to bits 8 through 15.

Signal Names

Each signal name is either followed by the “#” suffix or not. The “#” suffix indicates that the signal is asserted (i.e., active) when driven to an electrical low. Conversely, a signal name without the suffix is asserted when at the electrically high level. Some examples:

• SMI#, RESET# and MCERR# are asserted when low.

• BOOTSELECT and PWRGOOD are asserted when high.

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