Introduction

This chapter describes the Pentium® 4 processor core and it assumes that Hyper-Threading is disabled. The chapter entitled “Hyper-Threading” on page 965 expands upon this chapter to describe how the core works when Hyper-Threading is enabled. It should be stressed that not every aspect of the processor core is covered in this chapter:

• The chapter entitled “The Pentium® 4 Caches” on page 1009 covers the L1 Data Cache, the L2 Cache and the L3 Cache. The Trace Cache is covered in the current chapter.

• The chapter entitled “Hyper-Threading” on page 965 broadens the processor core discussion to cover Hyper-Threading.

• The chapter entitled “Pentium® 4 Handling of Loads and Stores” on page 1061 describes how the processor core handles loads (i.e., memory data reads) and stores (i.e., memory data writes).

• The chapter entitled “The Pentium® 4 Prescott” on page 1091 describes how the 90nm version of the Pentium® 4 (code named Prescott) improved on various aspects of the processor design.

Intel® refers to the overall core design as the NetBurst Architecture.