Initial Memory Reads

IA32 processors always begin operation in Real Mode. All memory addresses are formed by adding the 20-bit segment base address specified in a 16-bit segment register (“Memory Addressing” on page 71 explains how a 20-bit address is specified in a 16-bit segment register) to the 16-bit offset that is specified in:

  • the 16-bit IP (Instruction Pointer) register when the processor is forming the memory address for a code fetch.

  • the 16-bit SP (Stack Pointer) register when the processor is forming the memory address for a write into or a read from stack memory.

  • the instruction when the processor is forming the memory address for a data access.

Since the offset is a 16-bit value, all segments are restricted to a length of 64KB.

After reset is deasserted, the CS register contains a segment start value of F000h and the EIP register contains an offset of 0000FFF0h. It would seem that the first instruction would be fetched from memory location 000FFFF0h. Immediately following power-up, however, the processor forms the memory addresses for the initial memory instruction reads differently than it does during normal Real Mode operation. The segment portion of the address is FFFF000h, not 0000F000h. When the EIP offset of 0000FFF0h is added to the segment base address, the result is therefore FFFFFFF0h. This is the address that the processor drives onto the FSB during the initial memory instruction read. The address for memory instruction reads is formed in this way until the programmer loads any value into the CS register (even if it's the same value that it already contains)—in other words, until a far jump (or a far CALL) instruction is executed. Very typically, the first instruction found at the power-on restart address (address FFFFFFF0h) is a far jump to the start of the system's Power-On Self-Test (POST) program in ROM. The 16-bit value loaded into the CS register becomes the 20-bit base address of the code segment (the 16 bits from the CS register is extended to 20 bits by adding four bits of zero to the lower end of the 16-bit value). The upper 12 bits of the base address are always zero. From that point forward, the processor is only capable of addressing the first megabyte of memory space.

..................Content has been hidden....................

You can't read the all page of ebook, please click here login for view all page.
Reset
18.222.120.133