System Overview

Figure 1-3 on page 19 illustrates a typical PC system consisting of the major elements introduced in the following subsections.

Pentium® 4 Processor

The system processor executes the OS, application programs, and device drivers.

Memory Control Hub (MCH)

The MCH is connected to the IO Control Hub (ICH) by the high speed, 11-bit Hub Interface (HI) link. It provides the following functions:

• It incorporates the system memory controller.

• It provides the interface between the AGP device and system memory via the point-to-point AGP (Accelerated Graphics Port). Depending on the implementation, the AGP supports a 1x, 2x, 4x, or 8x transfer rate between the AGP graphics subsystem and system memory.

• It interfaces the processor's FSB to the AGP bus and to the system memory bus. In addition, it provides the interface to all other system devices through the ICH.

• Interacting with the ICH, the MCH provides the interface to system memory for all system devices connected to the ICH.

IO Control Hub (ICH)

The ICH is connected to the MCH by the high speed, 11-bit Hub Interface link. The ICH provides the following functions:

• The integrated Ethernet LAN controller is connected to the network via the LCI (LAN Controller Interface). The LAN controller can access system memory via the Hub Interface link connecting the ICH to the MCH. The processor communicates with the controller via the MCH/ICH communications link.

• An integrated IDE Controller permits connection to one or two IDE hard drives or to one hard drive and a CD ROM drive.

• An integrated USB 1.1-compatible host controller provides two USB 1.1 connectors.

• The Hub link to PCI bus interface (including the PCI bus arbiter).

• The integrated PCI bus arbiter supports up to five PCI card slots, each of which may contain a bus master-capable PCI card.

• The integrated System Management Bus (SMBus) interface permits the currently-running program to access the processor's internal Processor Information ROM (PIROM) as well as the processor's internal Thermal Diode.

• The Low-Pin Count (LPC) bus interface permits connection to legacy PC devices (e.g., parallel port, COM ports, floppy drive, keyboard, and mouse).

• The BIOS ROM interface. Identified as the FWH (FirmWare to Hub link) interface.

• The Audio Codec (AC) '97 Link. In the illustration, it is shown connected to the on-board Audio Codec as well as to the Communication and Networking Riser (CNR) connector.

• The integrated LAN interface. The ICH incorporates a 10/100 Ethernet interface.

• The integrated IO APIC. The ICH incorporates an IO APIC (Advanced Programmable Interrupt Controller) used to deliver interrupts from hardware devices to the processors in a multiple processor environment.

• Integrated legacy dual-8259a interrupt controllers. The ICH also incorporates dual, cascaded Intel® 8259a Programmable Interrupt Controllers (PICs) used to deliver interrupts to the processor in a single processor system.

Super IO (SIO) Chip

Connected to the ICH via the LPC (Low Pin Count) interface, the SIO incorporates the legacy devices (i.e., keyboard interface, mouse interface, COM ports 1 and 2, the Floppy interface, and parallel port 1).

DDR RAM

System memory is populated with Double-Data Rate RAM. The system memory controller is incorporated in the MCH.

IDE RAID Controller

The system board illustrated incorporates an embedded IDE RAID (Redundant Array of Inexpensive Drives) controller. Acting as a PCI bus master, this controller transfers disk data directly to and from system memory over the PCI bus and the Hub Interface.

USB 2.0 Controller

The system board illustrated incorporates an embedded USB 2.0 controller featuring two USB 2.0-compliant connectors. Acting as a PCI bus master, this controller can transfer data to and from system memory over the PCI bus and the Hub Interface.

Five PCI Card Slots

The system board illustrated incorporates five PCI card connectors permitting the installation of up to five PCI add-in cards.