FSB Transactions and the Caches

Background

When the L1 Data Cache has a read miss, it forwards a request for the 64-byte cache line to the L2 Cache. If the L2 Cache has a read miss on the sector (i.e., half line) and there is no L3 cache, the fill request is passed to the FSB Interface Unit:

• If the other sector of the target line is in the L2 Cache, a request for a single-sector read (i.e., a 64-byte read) is forwarded to the FSB Interface Unit.

• If the other sector of the line is not in the L2 Cache, a request for a two-sector read (i.e., a 128-byte read) is forwarded to the FSB Interface Unit.

If the L2 Cache has a read miss and there is an L3 Cache, the fill request is passed to the L3 Cache for fulfillment. If the L3 has a miss on the sector (i.e., half line), the fill request is passed to the FSB Interface Unit:

• If the other sector of the target line is in the L3 Cache, a request for a single-sector read (i.e., a 64-byte read) is forwarded to the FSB Interface Unit.

• If the other sector of the line is not in the L3 Cache, a request for a two-sector read (i.e., a 128-byte read) is forwarded to the FSB Interface Unit.

A Single-Sector Fetch

When the FSB Interface Unit receives a request for a single-sector read, it arbitrates for ownership of the FSB's Request Phase signal group and initiates a 64-byte transaction to fetch the sector.

A Two Sector Fetch

When the FSB Interface Unit receives a request for a two-sector read, it arbitrates for ownership of the FSB's Request Phase signal group and initiates a 64-byte transaction to fetch the critical sector (i.e., the one that caused the miss). A 64-byte transfer is the largest transfer that a FSB agent can request in a single transaction. Upon receipt of the critical sector, it is immediately placed in the cache that requested it and is forwarded to the originator of the request.

Although the processor will perform another 64-byte transaction to fetch the alternate sector from system memory, whether or not this transaction is performed immediately after the first one depends on the following:

• Whether or not the processor has a higher-priority transaction to perform.

• Whether or not other FSB agents are requesting ownership of the Request Phase signal group to initiate a transaction.

If neither of these conditions are true, the transaction to fetch the alternate sector will be performed immediately after the transaction to fetch the critical sector completes. However, if either of the conditions are true, the processor will not perform the transaction to fetch the alternate sector immediately. After the higher-priority event has been serviced or another FSB agent has initiated a transaction, the processor will rearbitrate for ownership of the FSB's Request Phase signal group and then fetch the alternate sector from system memory. When the alternate sector has been received, the FSB Interface Unit immediately forwards it to the cache that requested it and is also forwarded to the originator of the request (if the originator was the L2 Cache).

Writeback of a Modified Line

A castout of a modified sector is always performed as a 64-byte write on the FSB. The processor is not capable of performing a 128-byte transaction, so if it had to castout both modified sectors of a line, it must perform two 64-byte write transactions.