Bus Parking Option

Description

When a Pentium® 4 processor needs to perform a transaction on the FSB, it asserts its BR0# (Bus Request 0) output. This informs the other processor(s) and the chipset that the processor needs to initiate a transaction. When the other FSB agents agree to pass ownership of the Request Phase signal group to the processor, the processor starts its transaction. In the BCLK cycle in which it starts its transaction, the processor does one of two things:

• It deasserts its BR0# output to indicate that after the Request Phase is complete, it is surrendering ownership of the Request Phase Signal group. It does this either because it does not need to issue any additional transaction requests, or it has detected that one or more of the other processors are requesting ownership and it is therefore relinquishing ownership.

• It keeps its BR0# output pin asserted, permitting it to retain symmetric ownership. This gives it slightly faster access to the bus than if it relinquished ownership and then rearbitrated for it when it needs it again in the future.

Bus Parking Configuration

On the trailing-edge of reset, the processor samples its A15# input to determine whether to enable or disable its bus parking feature:

• Sampling A15# low disables bus parking. The processors in a multiprocessor should be configured in this manner. In this case, whenever the processor initiates a transaction and no other processor is requesting ownership, the processor deasserts its BR0# output to relinquish ownership. When another processor asserts its BR0# output to request ownership, it can then acquire ownership faster.

• Sampling A15# high enables bus parking. The processor in a single-processor system should be configured in this manner. In this case, whenever the processor initiates a transaction, the processor does not deassert its BR0# output to relinquish ownership. Rather, it keeps ownership, so that when it needs to issue another transaction it already has ownership of the Request Phase signal group.