The Introduction of the Celeron

As described earlier (see “The Pentium® II/Xeon/Celeron Roadmap” on page 660), the Celeron processor was initially introduced as a variant of the Pentium® processor. It had the following characteristics:

• The FSB arbitration scheme only supports one processor.

• The FSB operational frequency was 66MHz (the same as the high-end versions of the Pentium® Pro). It was deliberately designed to operate at a lower frequency than the Pentium® II to differentiate it from the higher priced Pentium® II.

• The first version (code-name Covington) eliminated the L2 Cache, resulting in worse performance than a high-end Pentium® processor. It had a revised cartridge format.

• Celeron Mendocino added an on-die 128KB L2 Cache, a full-speed BSB, a 66MHz FSB, and returned to the socket format. This was the very first Intel® x86 processor to have the L2 Cache integrated onto the processor die.

• Celeron Dixon had a 256KB on-die L2 Cache, a full-speed BSB, a 66MHz FSB, and was the first mobile Celeron.