If the BIST is executed when reset is removed, the processor initiates code fetching starting at the power-on restart address upon completion of the BIST. The EAX register contains:
Zero if the BIST completed without error.
A processor-specific, non-zero error code if the BIST failed.
After reset deassertion, the EDX register contains the information shown in Figure 37-1 on page 884.
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