Chapter 53. Pentium^® 4 FSB IO Transactions

The Previous Chapter

This chapter provided a detailed description of the Deferred Transaction mechanism. It included:

• The Problem.

• Example Read From a PCI Express Device.

• The Read Receives the Deferred Response.

• The Root Complex Performs the Read.

• The Root Complex Issues a Deferred Reply Transaction.

• Example Write To a PCI Express Device.

• The Write Receives the Defer Response.

• The Root Complex Delivers the Write Data to the Target.

• The Root Complex Issues a Deferred Reply Transaction.

This Chapter

This chapter describes the characteristics of FSB IO transactions. It includes:

• The IO Address Range.

• The Data Transfer Length.

• Behavior Permitted by the Spec.

• How the Pentium® 4 Processor Operates.

The Next Chapter

This chapter provides a detailed description of FSB Central Agent transactions. It includes:

• Point-to-Point vs. Broadcast.

• The Interrupt Acknowledge Transaction.

• The Special Transaction.

• The BTM Transaction Is Used for Program Debug.